LPC1112FHN33/203,5 NXP Semiconductors, LPC1112FHN33/203,5 Datasheet - Page 166

• Manufacturer Part Number: LPC1112FHN33/203,5
• Description: ARM Microcontrollers - MCU Cortex-M0 16kB flash up to 4 kB SRAM
• Manufacturer: NXP Semiconductors

Specifications of LPC1112FHN33/203,5

• Rohs: yes
• Core: ARM Cortex M0
• Processor Series: LPC1112
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 16 KB
• Data Ram Size: 4 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.8 V to 3.6 V
• Operating Temperature Range: - 65 C to + 150 C
• Package / Case: HVQFN-33
• Mounting Style: SMD/SMT
• Factory Pack Quantity: 260

NXP Semiconductors
Table 166. LPC1112 pin description table (TSSOP20 with V
[1]
[2]
[3]
UM10398
User manual
Symbol
R/PIO1_0/
AD1/CT32B1_CAP0
R/PIO1_1/
AD2/CT32B1_MAT0
R/PIO1_2/
AD3/CT32B1_MAT1
SWDIO/PIO1_3/
AD4/CT32B1_MAT2
PIO1_6/RXD/
CT32B0_MAT0
PIO1_7/TXD/
CT32B0_MAT1
V
V
XTALIN
XTALOUT
V
V
DD
DDA
SS
SSA
Pin state at reset for default function: I = Input; O = Output; PU = internal pull-up enabled (pins pulled up to full V
no pull-up/down enabled.
RESET functionality is not available in Deep power-down mode. Use the WAKEUP pin to reset the chip and wake up from Deep
power-down mode. An external pull-up resistor is required on this pin for the Deep power-down mode.
5 V tolerant pad providing digital I/O functions with configurable pull-up/pull-down resistors and configurable hysteresis.
7
8
9
10
11
12
15
5
14
13
16
6
[4]
[4]
[4]
[4]
[3]
[3]
[5]
[5]
Start
logic
input
yes
no
no
no
no
no
-
-
-
-
-
-
Chapter 10: LPC111x Pin configuration (LPC1100L series, TSSOP, DIP,
All information provided in this document is subject to legal disclaimers.
Type
I
I/O
I
I
O
I/O
I
O
I
I/O
I
O
I/O
I/O
I
O
I/O
I
O
I/O
O
O
I
I
I
O
I
I
Rev. 12 — 24 September 2012
Reset
state
[1]
I; PU
-
-
-
I; PU
-
-
-
I; PU
-
-
-
I; PU
-
-
-
I; PU
-
-
I; PU
-
-
-
-
-
-
-
-
Description
R — Reserved. Configure for an alternate function in the
IOCONFIG block.
PIO1_0 — General purpose digital input/output pin.
AD1 — A/D converter, input 1.
CT32B1_CAP0 — Capture input 0 for 32-bit timer 1.
R — Reserved. Configure for an alternate function in the
IOCONFIG block.
PIO1_1 — General purpose digital input/output pin.
AD2 — A/D converter, input 2.
CT32B1_MAT0 — Match output 0 for 32-bit timer 1.
R — Reserved. Configure for an alternate function in the
IOCONFIG block.
PIO1_2 — General purpose digital input/output pin.
AD3 — A/D converter, input 3.
CT32B1_MAT1 — Match output 1 for 32-bit timer 1.
SWDIO — Serial wire debug input/output.
PIO1_3 — General purpose digital input/output pin.
AD4 — A/D converter, input 4.
CT32B1_MAT2 — Match output 2 for 32-bit timer 1.
PIO1_6 — General purpose digital input/output pin.
RXD — Receiver input for UART.
CT32B0_MAT0 — Match output 0 for 32-bit timer 0.
PIO1_7 — General purpose digital input/output pin.
TXD — Transmitter output for UART.
CT32B0_MAT1 — Match output 1 for 32-bit timer 0.
3.3 V supply voltage to the internal regulator and the external
rail.
3.3 V supply voltage to the ADC. Also used as the ADC
reference voltage.
Input to the oscillator circuit and internal clock generator
circuits. Input voltage must not exceed 1.8 V.
Output from the oscillator amplifier.
Ground.
Analog ground.
DDA
and V
SSA
pins)
…continued
UM10398
DD
© NXP B.V. 2012. All rights reserved.
level ); IA = inactive,
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