LPC1112FHN33/203,5 NXP Semiconductors, LPC1112FHN33/203,5 Datasheet - Page 423

• Manufacturer Part Number: LPC1112FHN33/203,5
• Description: ARM Microcontrollers - MCU Cortex-M0 16kB flash up to 4 kB SRAM
• Manufacturer: NXP Semiconductors

Specifications of LPC1112FHN33/203,5

• Rohs: yes
• Core: ARM Cortex M0
• Processor Series: LPC1112
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 16 KB
• Data Ram Size: 4 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.8 V to 3.6 V
• Operating Temperature Range: - 65 C to + 150 C
• Package / Case: HVQFN-33
• Mounting Style: SMD/SMT
• Factory Pack Quantity: 260

NXP Semiconductors
UM10398
User manual
26.5.12 Read Boot code version number (UART ISP)
26.5.13 Compare <address1> <address2> <no of bytes> (UART ISP)
Table 386. LPC111x and LPC11Cxx part identification numbers
Table 387. UART ISP Read Boot Code version number command
Table 388. UART ISP Compare command
Device
LPC1114FHN33/303
LPC1114FBD48/323
LPC1114FBD48/333
LPC1114FHN33/333
LPC1114FHI33/303
LPC11D14FBD100/302
LPC1115FBD48/303
LPC11Cxx
LPC11C12FBD48/301
LPC11C14FBD48/301
LPC11C22FBD48/301
LPC11C24FBD48/301
Command
Input
Return Code CMD_SUCCESS followed by 2 bytes of boot code version number in ASCII format.
Description
Command
Input
Return Code CMD_SUCCESS | (Source and destination data are equal)
Description
Example
None
"M 8192 268468224 4<CR><LF>" compares 4 bytes from the RAM address
K
It is to be interpreted as <byte1(Major)>.<byte0(Minor)>.
This command is used to read the boot code version number.
M
Address1 (DST): Starting flash or RAM address of data bytes to be compared.
This address should be a word boundary.
Address2 (SRC): Starting flash or RAM address of data bytes to be compared.
This address should be a word boundary.
Number of Bytes: Number of bytes to be compared; should be a multiple of 4.
COMPARE_ERROR | (Followed by the offset of first mismatch)
COUNT_ERROR (Byte count is not a multiple of 4) |
ADDR_ERROR |
ADDR_NOT_MAPPED |
PARAM_ERROR
This command is used to compare the memory contents at two locations.
Compare result may not be correct when source or destination address
contains any of the first 512 bytes starting from address zero. First 512 bytes
are re-mapped to boot ROM
0x1000 8000 to the 4 bytes from the flash address 0x2000.
All information provided in this document is subject to legal disclaimers.
Rev. 12 — 24 September 2012
Chapter 26: LPC111x/LPC11Cxx Flash programming firmware
Hex coding
0x0004 0040
0x0004 0060
0x0004 0070
0x0004 0070
0x0004 0040
0x2540 102B
0x0005 0080
0x1421 102B
0x1440 102B
0x1431 102B
0x1430 102B
UM10398
© NXP B.V. 2012. All rights reserved.
423 of 538