LPC1112FHN33/203,5 NXP Semiconductors, LPC1112FHN33/203,5 Datasheet - Page 27

• Manufacturer Part Number: LPC1112FHN33/203,5
• Description: ARM Microcontrollers - MCU Cortex-M0 16kB flash up to 4 kB SRAM
• Manufacturer: NXP Semiconductors

Specifications of LPC1112FHN33/203,5

• Rohs: yes
• Core: ARM Cortex M0
• Processor Series: LPC1112
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 16 KB
• Data Ram Size: 4 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.8 V to 3.6 V
• Operating Temperature Range: - 65 C to + 150 C
• Package / Case: HVQFN-33
• Mounting Style: SMD/SMT
• Factory Pack Quantity: 260

NXP Semiconductors
UM10398
User manual
3.5.9 System PLL clock source select register
The reset value given in
Table 15.
This register selects the clock source for the system PLL. The SYSPLLCLKUEN register
(see
Remark: When switching clock sources, both clocks must be running before the clock
source is updated.
Remark: When using the C_CAN controller with baudrates above 100 kbit/s, the system
oscillator must be selected.
Table 16.
Bit
0
1
2
3
4
31:5
Bit
1:0
31:2
Section
Symbol
POR
EXTRST
WDT
BOD
SYSRST
-
Symbol
SEL
-
System reset status register (SYSRSTSTAT, address 0x4004 8030) bit description
System PLL clock source select register (SYSPLLCLKSEL, address 0x4004 8040)
bit description
3.5.10) must be toggled from LOW to HIGH for the update to take effect.
All information provided in this document is subject to legal disclaimers.
Value
0x0
0x1
0x2
0x3
-
Rev. 12 — 24 September 2012
Chapter 3: LPC111x/LPC11Cxx System configuration (SYSCON)
Value
0
1
0
1
0
1
0
1
0
1
-
Table 15
System PLL clock source
IRC oscillator
System oscillator
Reserved
Reserved
Description
Reserved
Description
POR reset status
No POR detected.
POR detected. Writing a one clears this reset.
Status of the external RESET pin.
No RESET event detected.
RESET detected. Writing a one clears this reset.
Status of the Watchdog reset
No WDT reset detected.
WDT reset detected. Writing a one clears this reset.
Status of the Brown-out detect reset
No BOD reset detected.
BOD reset detected. Writing a one clears this reset.
Status of the software system reset
No System reset detected.
System reset detected. Writing a one clears this reset.
Reserved
applies to the POR reset.
UM10398
© NXP B.V. 2012. All rights reserved.
27 of 538
Reset
value
0x0
0x0
0x0
0x0
0x0
0x0
Reset
value
0x00
0x00