LPC1112FHN33/203,5 NXP Semiconductors, LPC1112FHN33/203,5 Datasheet - Page 520

• Manufacturer Part Number: LPC1112FHN33/203,5
• Description: ARM Microcontrollers - MCU Cortex-M0 16kB flash up to 4 kB SRAM
• Manufacturer: NXP Semiconductors

Specifications of LPC1112FHN33/203,5

• Rohs: yes
• Core: ARM Cortex M0
• Processor Series: LPC1112
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 16 KB
• Data Ram Size: 4 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.8 V to 3.6 V
• Operating Temperature Range: - 65 C to + 150 C
• Package / Case: HVQFN-33
• Mounting Style: SMD/SMT
• Factory Pack Quantity: 260

NXP Semiconductors
Table 261. CAN message interface message control
Table 262. CAN message interface data A1 registers
Table 263. CAN message interface data A2 registers
Table 264. CAN message interface data B1 registers
Table 265. CAN message interface data B2 registers
Table 266. CAN transmission request 1 register
Table 267. CAN transmission request 2 register
Table 268. CAN new data 1 register (CANND1, address
Table 269. CAN new data 2 register (CANND2, address
Table 270. CAN interrupt pending 1 register (CANIR1,
Table 271. CAN interrupt pending 2 register (CANIR2,
Table 272. CAN message valid 1 register (CANMSGV1,
Table 273. CAN message valid 2 register (CANMSGV2,
Table 274. CAN clock divider register (CANCLKDIV, address
Table 275. Initialization of a transmit object. . . . . . . . . . .305
Table 276. Initialization of a receive object . . . . . . . . . . .306
Table 277. Parameters of the C_CAN bit time. . . . . . . . .310
Table 278. Counter/timer pin description . . . . . . . . . . . . .326
Table 279. Register overview: 16-bit counter/timer 0 CT16B0
Table 280. Register overview: 16-bit counter/timer 1 CT16B1
Table 281. Interrupt Register (TMR16B0IR - address
Table 282. Timer Control Register (TMR16B0TCR - address
Table 283: Timer counter registers (TMR16B0TC, address
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User manual
description . . . . . . . . . . . . . . . . . . . . . . . . . . .291
registers (CANIF1_MCTRL, address
0x4005 0038 and CANIF2_MCTRL, address
0x4005 0098) bit description
(CANIF1_DA1, address 0x4005 003C and
CANIF2_DA1, address 0x4005 009C) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . .293
(CANIF1_DA2, address 0x4005 0040 and
CANIF2_DA2, address 0x4005 00A0) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . .293
(CANIF1_DB1, address 0x4005 0044 and
CANIF2_DB1, address 0x4005 00A4) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . .293
(CANIF1_DB2, address 0x4005 0048 and
CANIF2_DB2, address 0x4005 00A8) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . .293
(CANTXREQ1, address 0x4005 0100) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . .294
(CANTXREQ2, address 0x4005 0104) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . .294
0x4005 0120) bit description . . . . . . . . . . . . .295
0x4005 0124) bit description . . . . . . . . . . . . .295
address 0x4005 0140) bit description. . . . . . .295
addresses 0x4005 0144) bit description . . . . .296
addresses 0x4005 0160) bit description . . . . .296
address 0x4005 0164) bit description. . . . . . .296
0x4005 0180) bit description . . . . . . . . . . . . .297
(base address 0x4000 C000) . . . . . . . . . . . .327
(base address 0x4001 0000) . . . . . . . . . . . .328
0x4000 C000 and TMR16B1IR - address
0x4001 0000) bit description . . . . . . . . . . . . .329
0x4000 C004 and TMR16B1TCR - address
0x4001 0004) bit description . . . . . . . . . . . . .329
0x4000 C008 and TMR16B1TC 0x4001 0008) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . .329
. . . . . . . . . . . .291
All information provided in this document is subject to legal disclaimers.
Rev. 12 — 24 September 2012
Table 284: Prescale registers (TMR16B0PR, address
Table 285: Prescale counter registers (TMR16B0PC,
Table 286. Match Control Register (TMR16B0MCR -
Table 287: Match registers (TMR16B0MR0 to 3, addresses
Table 288. Capture Control Register (TMR16B0CCR -
Table 289: Capture registers (TMR16B0CR0, address
Table 290. External Match Register (TMR16B0EMR -
Table 291. External match control . . . . . . . . . . . . . . . . . 334
Table 292. Count Control Register (TMR16B0CTCR -
Table 293. PWM Control Register (TMR16B0PWMC -
Table 294. Counter/timer pin description . . . . . . . . . . . . 340
Table 295. Register overview: 16-bit counter/timer 0 CT16B0
Table 296. Register overview: 16-bit counter/timer 1 CT16B1
Table 297. Interrupt Register (TMR16B0IR - address
Table 298. Timer Control Register (TMR16B0TCR - address
Table 299: Timer counter registers (TMR16B0TC, address
Table 300: Prescale registers (TMR16B0PR, address
Table 301: Prescale counter registers (TMR16B0PC,
Table 302. Match Control Register (TMR16B0MCR -
Table 303: Match registers (TMR16B0MR0 to 3, addresses
Table 304. Capture Control Register (TMR16B0CCR -
Table 305: Capture registers (TMR16B0CR0/1, address
0x4000 C00C and TMR16B1PR 0x4001 000C) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . . 330
address 0x4001 C010 and TMR16B1PC
0x4000 0010) bit description . . . . . . . . . . . . . 330
address 0x4000 C014 and TMR16B1MCR -
address 0x4001 0014) bit description . . . . . 330
0x4000 C018 to 24 and TMR16B1MR0 to 3,
addresses 0x4001 0018 to 24) bit description 332
address 0x4000 C028 and TMR16B1CCR -
address 0x4001 0028) bit description . . . . . . 332
0x4000 C02C and TMR16B1CR0, address
0x4001 002C) bit description . . . . . . . . . . . . . 332
address 0x4000 C03C and TMR16B1EMR -
address 0x4001 003C) bit description . . . . . . 333
address 0x4000 C070 and TMR16B1CTCR -
address 0x4001 0070) bit description . . . . . . 335
address 0x4000 C074 and TMR16B1PWMC-
address 0x4001 0074) bit description . . . . . . 335
(base address 0x4000 C000) . . . . . . . . . . . . 341
(base address 0x4001 0000) . . . . . . . . . . . . 342
0x4000 C000 and TMR16B1IR - address
0x4001 0000) bit description . . . . . . . . . . . . . 343
0x4000 C004 and TMR16B1TCR - address
0x4001 0004) bit description . . . . . . . . . . . . . 343
0x4000 C008 and TMR16B1TC 0x4001 0008) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . . 343
0x4000 C00C and TMR16B1PR 0x4001 000C) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . . 344
address 0x4001 C010 and TMR16B1PC
0x4000 0010) bit description . . . . . . . . . . . . . 344
address 0x4000 C014 and TMR16B1MCR -
address 0x4001 0014) bit description . . . . . 344
0x4000 C018 to 24 and TMR16B1MR0 to 3,
addresses 0x4001 0018 to 24) bit description 346
address 0x4000 C028 and TMR16B1CCR -
address 0x4001 0028) bit description . . . . . . 346
Chapter 29: Supplementary information
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© NXP B.V. 2012. All rights reserved.
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