LPC1112FHN33/203,5 NXP Semiconductors, LPC1112FHN33/203,5 Datasheet - Page 532

• Manufacturer Part Number: LPC1112FHN33/203,5
• Description: ARM Microcontrollers - MCU Cortex-M0 16kB flash up to 4 kB SRAM
• Manufacturer: NXP Semiconductors

Specifications of LPC1112FHN33/203,5

• Rohs: yes
• Core: ARM Cortex M0
• Processor Series: LPC1112
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 16 KB
• Data Ram Size: 4 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.8 V to 3.6 V
• Operating Temperature Range: - 65 C to + 150 C
• Package / Case: HVQFN-33
• Mounting Style: SMD/SMT
• Factory Pack Quantity: 260

NXP Semiconductors
17.4.13
17.4.14
17.4.15
Chapter 18: LPC1100/LPC1100C/LPC1100L series: 16-bit counter/timer CT16B0/1
18.1
18.2
18.3
18.4
18.5
18.6
18.7
18.7.1
18.7.2
18.7.3
18.7.4
18.7.5
Chapter 19: LPC1100XL series: 16-bit counter/timer CT16B0/1
19.1
19.2
19.3
19.4
19.5
19.6
19.7
19.7.1
19.7.2
19.7.3
19.7.4
19.7.5
Chapter 20: LPC1100/LPC1100C/LPC1100L series: 32-bit counter/timer CT32B0/1
20.1
20.2
20.3
UM10398
User manual
How to read this chapter . . . . . . . . . . . . . . . . 325
Basic configuration . . . . . . . . . . . . . . . . . . . . 325
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 325
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . 326
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . 326
Pin description . . . . . . . . . . . . . . . . . . . . . . . . 326
Register description . . . . . . . . . . . . . . . . . . . 326
How to read this chapter . . . . . . . . . . . . . . . . 339
Basic configuration . . . . . . . . . . . . . . . . . . . . 339
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 339
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . 340
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . 340
Pin description . . . . . . . . . . . . . . . . . . . . . . . . 340
Register description . . . . . . . . . . . . . . . . . . . 340
How to read this chapter . . . . . . . . . . . . . . . . 354
Basic configuration . . . . . . . . . . . . . . . . . . . . 354
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 354
CANopen SDO expedited read callback. . . . 320
CANopen SDO expedited write callback . . . 320
CANopen SDO segmented read callback . . 321
Pin-out variations . . . . . . . . . . . . . . . . . . . . . .325
Interrupt Register (TMR16B0IR and
TMR16B1IR). . . . . . . . . . . . . . . . . . . . . . . . . 328
Timer Control Register (TMR16B0TCR and
TMR16B1TCR) . . . . . . . . . . . . . . . . . . . . . . . 329
Timer Counter (TMR16B0TC - address 0x4000
0008) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 329
Prescale Register (TMR16B0PR - address
0x4000 C00C and TMR16B1PR - address
0x4001 000C) . . . . . . . . . . . . . . . . . . . . . . . . 329
Prescale Counter register (TMR16B0PC -
address 0x4000 C010 and TMR16B1PC -
address 0x4001 0010) . . . . . . . . . . . . . . . . . 330
Interrupt Register (TMR16B0IR and
TMR16B1IR). . . . . . . . . . . . . . . . . . . . . . . . . 343
Timer Control Register (TMR16B0TCR and
TMR16B1TCR) . . . . . . . . . . . . . . . . . . . . . . . 343
Timer Counter (TMR16B0TC - address 0x4000
0008) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 343
Prescale Register (TMR16B0PR - address
0x4000 C00C and TMR16B1PR - address
0x4001 000C) . . . . . . . . . . . . . . . . . . . . . . . . 344
Prescale Counter register (TMR16B0PC -
address 0x4000 C010 and TMR16B1PC -
address 0x4001 0010) . . . . . . . . . . . . . . . . . 344
C008 and TMR16B1TC - address 0x4001
C008 and TMR16B1TC - address 0x4001
All information provided in this document is subject to legal disclaimers.
Rev. 12 — 24 September 2012
17.4.16
17.4.17
18.7.6
18.7.7
18.7.8
18.7.9
18.7.10
18.7.11
18.7.12
18.7.13
18.8
18.9
19.7.6
19.7.7
19.7.8
19.7.9
19.7.10
19.7.11
19.7.12
19.7.13
19.8
19.9
20.4
20.5
20.6
Example timer operation . . . . . . . . . . . . . . . 337
Architecture . . . . . . . . . . . . . . . . . . . . . . . . . . 338
Example timer operation . . . . . . . . . . . . . . . 352
Architecture . . . . . . . . . . . . . . . . . . . . . . . . . . 352
Applications. . . . . . . . . . . . . . . . . . . . . . . . . . 354
Description . . . . . . . . . . . . . . . . . . . . . . . . . . 355
Pin description . . . . . . . . . . . . . . . . . . . . . . . 355
CANopen SDO segmented write callback . . 322
CANopen fall-back SDO handler callback . . 323
Match Control Register (TMR16B0MCR and
TMR16B1MCR) . . . . . . . . . . . . . . . . . . . . . . 330
Match Registers (TMR16B0MR0/1/2/3 -
addresses 0x4000 C018/1C/20/24 and
TMR16B1MR0/1/2/3 - addresses 0x4001
0018/1C/20/24) . . . . . . . . . . . . . . . . . . . . . . 331
Capture Control Register (TMR16B0CCR and
TMR16B1CCR) . . . . . . . . . . . . . . . . . . . . . . 332
Capture Register (CT16B0CR0 - address 0x4000
C02C and CT16B1CR0 - address 0x4001
002C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 332
External Match Register (TMR16B0EMR and
TMR16B1EMR) . . . . . . . . . . . . . . . . . . . . . . 333
Count Control Register (TMR16B0CTCR and
TMR16B1CTCR) . . . . . . . . . . . . . . . . . . . . . 334
PWM Control register (TMR16B0PWMC and
TMR16B1PWMC) . . . . . . . . . . . . . . . . . . . . 335
Rules for single edge controlled PWM
outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 336
Match Control Register (TMR16B0MCR and
TMR16B1MCR) . . . . . . . . . . . . . . . . . . . . . . 344
Match Registers (TMR16B0MR0/1/2/3 -
addresses 0x4000 C018/1C/20/24 and
TMR16B1MR0/1/2/3 - addresses 0x4001
0018/1C/20/24) . . . . . . . . . . . . . . . . . . . . . . 345
Capture Control Register (TMR16B0CCR and
TMR16B1CCR) . . . . . . . . . . . . . . . . . . . . . . 346
Capture Register (CT16B0CR0/1 - address
0x4000 C02C/30 and CT16B1CR0/1 - address
0x4001 002C/30) . . . . . . . . . . . . . . . . . . . . . 347
External Match Register (TMR16B0EMR and
TMR16B1EMR) . . . . . . . . . . . . . . . . . . . . . . 347
Count Control Register (TMR16B0CTCR and
TMR16B1CTCR) . . . . . . . . . . . . . . . . . . . . . 349
PWM Control register (TMR16B0PWMC and
TMR16B1PWMC) . . . . . . . . . . . . . . . . . . . . 350
Rules for single edge controlled PWM
outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 351
Chapter 29: Supplementary information
UM10398
© NXP B.V. 2012. All rights reserved.
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