LPC1112FHN33/203,5 NXP Semiconductors, LPC1112FHN33/203,5 Datasheet - Page 278

• Manufacturer Part Number: LPC1112FHN33/203,5
• Description: ARM Microcontrollers - MCU Cortex-M0 16kB flash up to 4 kB SRAM
• Manufacturer: NXP Semiconductors

Specifications of LPC1112FHN33/203,5

• Rohs: yes
• Core: ARM Cortex M0
• Processor Series: LPC1112
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 16 KB
• Data Ram Size: 4 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.8 V to 3.6 V
• Operating Temperature Range: - 65 C to + 150 C
• Package / Case: HVQFN-33
• Mounting Style: SMD/SMT
• Factory Pack Quantity: 260

NXP Semiconductors
UM10398
User manual
Table 244. Register overview: CCAN (base address 0x4005 0000)
Name
CANIF1_DA1
CANIF1_DA2
CANIF1_DB1
CANIF1_DB2
-
CANIF2_CMDREQ R/W
CANIF2_CMDMSK
_W
CANIF2_CMDMSK
_R
CANIF2_MSK1
CANIF2_MSK2
CANIF2_ARB1
CANIF2_ARB2
CANIF2_MCTRL
CANIF2_DA1
CANIF2_DA2
CANIF2_DB1
CANIF2_DB2
-
CANTXREQ1
CANTXREQ2
-
CANND1
CANND2
-
CANIR1
CANIR2
-
CANMSGV1
CANMSGV2
-
CANCLKDIV
All information provided in this document is subject to legal disclaimers.
Access
R/W
R/W
R/W
R/W
-
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
-
RO
RO
-
RO
RO
-
RO
RO
-
RO
RO
-
R/W
Rev. 12 — 24 September 2012
Address
offset
0x03C
0x040
0x044
0x048
0x04C -
0x07C
0x080
0x084
0x084
0x088
0x08C
0x090
0x094
0x098
0x09C
0x0A0
0x0A4
0x0A8
0x0AC -
0x0FC
0x100
0x104
0x108 -
0x11C
0x120
0x124
0x128 -
0x13C
0x140
0x144
0x148 -
0x15C
0x160
0x164
0x168 -
0x17C
0x180
Chapter 16: LPC111x/LPC11Cxx C_CAN controller
Interrupt pending 1
Interrupt pending 2
Message valid 1
Message valid 2
Description
Message interface 1 data A1
Message interface 1 data A2
Message interface 1 data B1
Message interface 1 data B2
Reserved
Message interface 2 command request 0x0001
Message interface 2 command mask
(write direction)
Message interface 2 command mask
(read direction)
Message interface 2 mask 1
Message interface 2 mask 2
Message interface 2 arbitration 1
Message interface 2 arbitration 2
Message interface 2 message control
Message interface 2 data A1
Message interface 2 data A2
Message interface 2 data B1
Message interface 2 data B2
Reserved
Transmission request 1
Transmission request 2
Reserved
New data 1
New data 2
Reserved
Reserved
Reserved
Can clock divider register
UM10398
© NXP B.V. 2012. All rights reserved.
Reset
value
0x0000
0x0000
0x0000
0x0000
-
0x0000
0x0000
0xFFFF
0xFFFF
0x0000
0x0000
0x0000
0x0000
0x0000
0x0000
0x0000
-
0x0000
0x0000
-
0x0000
0x0000
-
0x0000
0x0000
-
0x0000
0x0000
-
0x0000
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