LPC1112FHN33/203,5 NXP Semiconductors, LPC1112FHN33/203,5 Datasheet - Page 132

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LPC1112FHN33/203,5

Manufacturer Part Number
LPC1112FHN33/203,5
Description
ARM Microcontrollers - MCU Cortex-M0 16kB flash up to 4 kB SRAM
Manufacturer
NXP Semiconductors
Datasheet

Specifications of LPC1112FHN33/203,5

Rohs
yes
Core
ARM Cortex M0
Processor Series
LPC1112
Data Bus Width
32 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
16 KB
Data Ram Size
4 KB
On-chip Adc
Yes
Operating Supply Voltage
1.8 V to 3.6 V
Operating Temperature Range
- 65 C to + 150 C
Package / Case
HVQFN-33
Mounting Style
SMD/SMT
Factory Pack Quantity
260
NXP Semiconductors
UM10398
User manual
8.4.43 IOCON_SCK0_LOC
Table 146. IOCON_PIO3_3 register (IOCON_PIO3_3, address 0x4004 40AC) bit description
Table 147. IOCON SCK0 location register (IOCON_SCK0_LOC, address 0x4004 40B0) bit
Bit
4:3
5
9:6
10
31:11
Bit
1:0
31:2
Symbol
MODE
HYS
-
OD
-
Symbol
SCKLOC
-
description
All information provided in this document is subject to legal disclaimers.
-
Value
0x0
0x1
0x2
0x3
0
1
0
1
-
Value
0x0
0x1
0x2
0x3
-
Rev. 12 — 24 September 2012
Chapter 8: LPC1100XL series: I/O configuration (IOCONFIG)
control).
Inactive (no pull-down/pull-up resistor enabled).
Pull-down resistor enabled.
Pull-up resistor enabled.
Repeater mode.
Hysteresis.
Disable.
Enable.
Reserved
Standard GPIO output
Open-drain output
Selects pin location for SCK0 function.
Selects SCK0 function in pin location PIO2_11/SCK0 (see
Selects SCK0 function in pin location PIO0_6/SCK0 (see
Reserved.
Description
Selects function mode (on-chip pull-up/pull-down resistor
Selects pseudo open-drain mode.
Reserved
Description
Selects SCK0 function in pin location
SWCLK/PIO0_10/SCK0/CT16B0_MAT2 (see
Table
Table
Reserved.
131).
122).
Table
UM10398
© NXP B.V. 2012. All rights reserved.
129).
132 of 538
Reset
value
10
0
0011
0
-
Reset
value
00
-

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