LPC1112FHN33/203,5 NXP Semiconductors, LPC1112FHN33/203,5 Datasheet - Page 102

• Manufacturer Part Number: LPC1112FHN33/203,5
• Description: ARM Microcontrollers - MCU Cortex-M0 16kB flash up to 4 kB SRAM
• Manufacturer: NXP Semiconductors

Specifications of LPC1112FHN33/203,5

• Rohs: yes
• Core: ARM Cortex M0
• Processor Series: LPC1112
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 16 KB
• Data Ram Size: 4 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.8 V to 3.6 V
• Operating Temperature Range: - 65 C to + 150 C
• Package / Case: HVQFN-33
• Mounting Style: SMD/SMT
• Factory Pack Quantity: 260

NXP Semiconductors
8.4 Register description
UM10398
User manual
8.3.3 Hysteresis
8.3.4 A/D-mode
8.3.5 I
8.3.6 Open-drain Mode
not applicable to the Deep power-down mode. Repeater mode may typically be used to
prevent a pin from floating (and potentially using significant power if it floats to an
indeterminate state) if it is temporarily not driven.
The input buffer for digital functions can be configured with hysteresis or as plain buffer
through the IOCON registers (see the LPC1100XL data sheet for details).
If the external pad supply voltage V
can be enabled or disabled. If V
to use the pin in input mode.
In A/D-mode, the digital receiver is disconnected to obtain an accurate input voltage for
analog-to-digital conversions. This mode can be selected in those IOCON registers that
control pins with an analog function. If A/D mode is selected, Hysteresis and Pin mode
settings have no effect.
For pins without analog functions, the A/D-mode setting has no effect.
If the I
and IOCON_PIO0_5
I
Remark: Either Standard mode/Fast-mode I
selected if the pin is used as GPIO pin.
When output is selected, either by selecting a special function in the FUNC field, or by
selecting GPIO function for a pin having a 1 in its GPIODIR register, a 1 in the OD bit
selects open-drain operation, that is, a 1 disables the high-drive transistor. This option has
no effect on the primary I
The I/O configuration registers control the PIO port pins, the inputs and outputs of all
peripherals and functional blocks, the I
Each port pin PIOn_m has one IOCON register assigned to control the pin’s function and
electrical characteristics.
2
2
C-modes:
•
•
•
C mode
Standard mode/Fast-mode I
output according to the I
Fast-mode Plus with input glitch filter (this includes an open-drain output according to
the I
Standard open-drain I/O functionality without input filter.
2
C function is selected by the FUNC bits of registers IOCON_PIO0_4
2
C-bus specification). In this mode, the pins function as high-current sinks.
All information provided in this document is subject to legal disclaimers.
Rev. 12 — 24 September 2012
(Table
2
Chapter 8: LPC1100XL series: I/O configuration (IOCONFIG)
C pins.
116), then the I
2
C-bus specification).
DD
2
C with input glitch filter (this includes an open-drain
is below 2.5 V, the hysteresis buffer must be disabled
DD
is between 2.5 V and 3.6 V, the hysteresis buffer
2
C-bus pins, and the ADC input pins.
2
C-bus pins can be configured for different
2
C or Standard I/O functionality should be
UM10398
© NXP B.V. 2012. All rights reserved.
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