LPC1112FHN33/203,5 NXP Semiconductors, LPC1112FHN33/203,5 Datasheet - Page 435

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LPC1112FHN33/203,5

Manufacturer Part Number
LPC1112FHN33/203,5
Description
ARM Microcontrollers - MCU Cortex-M0 16kB flash up to 4 kB SRAM
Manufacturer
NXP Semiconductors
Datasheet

Specifications of LPC1112FHN33/203,5

Rohs
yes
Core
ARM Cortex M0
Processor Series
LPC1112
Data Bus Width
32 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
16 KB
Data Ram Size
4 KB
On-chip Adc
Yes
Operating Supply Voltage
1.8 V to 3.6 V
Operating Temperature Range
- 65 C to + 150 C
Package / Case
HVQFN-33
Mounting Style
SMD/SMT
Factory Pack Quantity
260
NXP Semiconductors
UM10398
User manual
26.7.10 Erase page
26.7.8 Reinvoke ISP (IAP)
26.7.9 ReadUID (IAP)
Table 402. IAP Reinvoke ISP
Table 403. IAP ReadUID command
Remark:
Table 404. IAP Erase page command
Command
Input
Return Code
Result
Description
Command
Input
Return Code
Result
Description
Command
Input
Return Code
Result
Description
See
Table 368
Compare
Command code: 57 (decimal)
None
None.
This command is used to invoke the bootloader in ISP mode. It maps boot
vectors, sets PCLK = CCLK, configures UART pins RXD and TXD, resets
counter/timer CT32B1 and resets the U0FDR (see
may be used when a valid user program is present in the internal flash memory
and the PIO0_1 pin is not accessible to force the ISP mode.
If there is more than one boot source available (see
must be configured correctly to select the appropriate boot source:
Compare
Command code: 58 (decimal)
CMD_SUCCESS
Result0: The first 32-bit word (at the lowest address).
Result1: The second 32-bit word.
Result2: The third 32-bit word.
Result3: The fourth 32-bit word.
This command is used to read the unique ID.
Erase page
Command code: 59 (decimal)
Param0: Start page number.
Param1: End page number (should be greater than or equal to start page)
Param2: System Clock Frequency (CCLK) in kHz.
CMD_SUCCESS |
BUSY |
SECTOR_NOT_PREPARED_FOR_WRITE_OPERATION |
INVALID_SECTOR
None
This command is used to erase a page or multiple pages of on-chip flash memory.
To erase a single page use the same "start" and "end" page numbers. See
Table 368
All information provided in this document is subject to legal disclaimers.
Configure pin PIO0_3 as output.
Drive the output to LOW or HIGH depending on the boot source (see
Section
Rev. 12 — 24 September 2012
Chapter 26: LPC111x/LPC11Cxx Flash programming firmware
for list of parts that implement this command.
for list of parts that implement this command.
26.3.1).
Table
Section
199). This command
26.1), pin PIO0_3
UM10398
© NXP B.V. 2012. All rights reserved.
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