LPC1112FHN33/203,5 NXP Semiconductors, LPC1112FHN33/203,5 Datasheet - Page 416

• Manufacturer Part Number: LPC1112FHN33/203,5
• Description: ARM Microcontrollers - MCU Cortex-M0 16kB flash up to 4 kB SRAM
• Manufacturer: NXP Semiconductors

Specifications of LPC1112FHN33/203,5

• Rohs: yes
• Core: ARM Cortex M0
• Processor Series: LPC1112
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 16 KB
• Data Ram Size: 4 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.8 V to 3.6 V
• Operating Temperature Range: - 65 C to + 150 C
• Package / Case: HVQFN-33
• Mounting Style: SMD/SMT
• Factory Pack Quantity: 260

NXP Semiconductors
26.5 UART ISP commands
UM10398
User manual
26.4.7 Interrupts during IAP
26.4.8 RAM used by ISP command handler
26.4.9 RAM used by IAP command handler
The on-chip flash memory is not accessible during erase/write operations. When the user
application code starts executing the interrupt vectors from the user flash area are active.
Before making any IAP call, either disable the interrupts or ensure that the user interrupt
vectors are active in RAM and that the interrupt handlers reside in RAM. The IAP code
does not use or disable interrupts.
ISP commands use on-chip RAM from 0x1000 017C to 0x1000 025B. The user could use
this area, but the contents may be lost upon reset. Flash programming commands use the
top 32 bytes of on-chip RAM. The stack is located at (RAM top  32). The maximum stack
usage is 256 bytes and it grows downwards.
Flash programming commands use the top 32 bytes of on-chip RAM. The maximum stack
usage in the user allocated stack space is 128 bytes and it grows downwards.
The following commands are accepted by the ISP command handler. Detailed status
codes are supported for each command. The command handler sends the return code
INVALID_COMMAND when an undefined command is received. Commands and return
codes are in ASCII format.
CMD_SUCCESS is sent by ISP command handler only when received ISP command has
been completely executed and the new ISP command can be given by the host.
Exceptions from this rule are "Set Baud Rate", "Write to RAM", "Read Memory", and "Go"
commands.
Table 374. UART ISP command summary
ISP Command
Unlock
Set Baud Rate
Echo
Write to RAM
Read Memory
Prepare sector(s) for
write operation
Copy RAM to flash
Go
Erase sector(s)
Blank check sector(s)
Read Part ID
Read Boot code version K
Compare
ReadUID
All information provided in this document is subject to legal disclaimers.
Rev. 12 — 24 September 2012
Chapter 26: LPC111x/LPC11Cxx Flash programming firmware
Usage
U <Unlock Code>
B <Baud Rate> <stop bit>
A <setting>
W <start address> <number of bytes>
R <address> <number of bytes>
P <start sector number> <end sector number>
G <address> <Mode>
E <start sector number> <end sector number>
I <start sector number> <end sector number>
J
N
C <Flash address> <RAM address> <number of bytes>
M <address1> <address2> <number of bytes>
UM10398
© NXP B.V. 2012. All rights reserved.
Described in
Table 375
Table 376
Table 377
Table 378
Table 379
Table 380
Table 381
Table 382
Table 383
Table 384
Table 385
Table 387
Table 388
Table 389
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