LPC1112FHN33/203,5 NXP Semiconductors, LPC1112FHN33/203,5 Datasheet - Page 425

• Manufacturer Part Number: LPC1112FHN33/203,5
• Description: ARM Microcontrollers - MCU Cortex-M0 16kB flash up to 4 kB SRAM
• Manufacturer: NXP Semiconductors

Specifications of LPC1112FHN33/203,5

• Rohs: yes
• Core: ARM Cortex M0
• Processor Series: LPC1112
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 16 KB
• Data Ram Size: 4 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.8 V to 3.6 V
• Operating Temperature Range: - 65 C to + 150 C
• Package / Case: HVQFN-33
• Mounting Style: SMD/SMT
• Factory Pack Quantity: 260

NXP Semiconductors
26.6 C_CAN communication protocol
UM10398
User manual
26.6.1 C_CAN ISP SDO communication
Remark: The C_CAN interface is available on LPC11Cxx parts only.
The C_CAN bootloader is activated by the ROM reset handler automatically if PIO0_3 is
LOW on reset and the ISP entry enabled (PIO0_1 LOW). The C_CAN bootloader
initializes the on-chip oscillator and the CAN controller for a CAN bit rate of 100 kbit/s and
sets its own CANopen Node ID to a fixed value. The bootloader then waits for CANopen
SDO commands and responds to them. These commands allow to read and write
anything in a so-called Object Dictionary (OD). The OD contains entries that are
addressed via a 16-bit index and 8-bit subindex. The command interface is part of this
OD.
The C_CAN ISP command handler allows to perform all functions that are otherwise
available via the UART ISP commands, see
The SDO commands are received, processed and responded to “forever” until the
command to jump to a certain execution address (“Go”) has been received or the chip is
reset.
The C_CAN ISP handler occupies the fixed CANopen node ID 125 (0x7D).
Table 391. C_CAN ISP and UART ISP command summary
The CAN ISP node listens for CAN 2.0A (11-bit) messages with the identifier of 0x600
plus the Node ID 0x7D equaling to 0x67D. The node sends SDO responses with the
identifier 0x580 plus Node ID equaling to 0x5FD. The SDO communication protocols
“expedited” and “segmented” are supported. This means that communication is always
confirmed: Each request CAN message will be followed by a response message from the
ISP node.
The SDO block transfer mode is not supported.
ISP Command
Unlock
Set Baud Rate
Echo
Write to RAM
Read Memory
Prepare sector(s) for write operation
Copy RAM to flash
Go
Erase sector(s)
Blank check sector(s)
Read Part ID
Read Boot code version
ReadUID
Compare
All information provided in this document is subject to legal disclaimers.
Rev. 12 — 24 September 2012
Chapter 26: LPC111x/LPC11Cxx Flash programming firmware
C_CAN usage
Section 26.6.3
n/a
n/a
Section 26.6.4
Section 26.6.5
Section 26.6.6
Section 26.6.7
Section 26.6.8
Section 26.6.9
Section 26.6.10
Section 26.6.11
Section 26.6.12
Section 26.6.13
Section 26.6.14
Table
391.
UART usage
Table 375
Table 376
Table 377
Table 378
Table 379
Table 380
Table 381
Table 382
Table 383
Table 384
Table 385
Table 387
Table 389
Table 388
UM10398
© NXP B.V. 2012. All rights reserved.
425 of 538