LPC1112FHN33/203,5 NXP Semiconductors, LPC1112FHN33/203,5 Datasheet - Page 476

• Manufacturer Part Number: LPC1112FHN33/203,5
• Description: ARM Microcontrollers - MCU Cortex-M0 16kB flash up to 4 kB SRAM
• Manufacturer: NXP Semiconductors

Specifications of LPC1112FHN33/203,5

• Rohs: yes
• Core: ARM Cortex M0
• Processor Series: LPC1112
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 16 KB
• Data Ram Size: 4 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.8 V to 3.6 V
• Operating Temperature Range: - 65 C to + 150 C
• Package / Case: HVQFN-33
• Mounting Style: SMD/SMT
• Factory Pack Quantity: 260

NXP Semiconductors
UM10398
User manual
28.5.4.4.5 Examples
28.5.4.5.1 Syntax
28.5.4.5.2 Operation
28.5.4.5.3 Restrictions
28.5.4.5 LDM and STM
Load and Store Multiple registers.
LDM Rn{!}, reglist
STM Rn!, reglist
where:
LDMIA and LDMFD are synonyms for LDM. LDMIA refers to the base register being
Incremented After each access. LDMFD refers to its use for popping data from Full
Descending stacks.
STMIA and STMEA are synonyms for STM. STMIA refers to the base register being
Incremented After each access. STMEA refers to its use for pushing data onto Empty
Ascending stacks.
LDM instructions load the registers in reglist with word values from memory addresses
based on Rn.
STM instructions store the word values in the registers in reglist to memory addresses
based on Rn.
The memory addresses used for the accesses are at 4-byte intervals ranging from the
value in the register specified by Rn to the value in the register specified by Rn + 4 * (n-1),
where n is the number of registers in reglist. The accesses happens in order of increasing
register numbers, with the lowest numbered register using the lowest memory address
and the highest number register using the highest memory address. If the writeback suffix
is specified, the value in the register specified by Rn + 4 *n is written back to the register
specified by Rn.
In these instructions:
•
•
LDR
LDR
Rn is the register on which the memory addresses are based.
! writeback suffix.
reglist is a list of one or more registers to be loaded or stored, enclosed in braces. It can
contain register ranges. It must be comma separated if it contains more than one
register or register range, see
reglist and Rn are limited to R0-R7.
the writeback suffix must always be used unless the instruction is an LDM where
reglist also contains Rn, in which case the writeback suffix must not be used.
R0, LookUpTable ; Load R0 with a word of data from an address
R3, [PC, #100] ; Load R3 with memory word at (PC + 100).
Chapter 28: LPC111x/LPC11Cxx Appendix: ARM Cortex-M0 reference
All information provided in this document is subject to legal disclaimers.
Rev. 12 — 24 September 2012
; labelled as LookUpTable.
Section
28–28.5.4.5.5.
UM10398
© NXP B.V. 2012. All rights reserved.
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