LPC1112FHN33/203,5 NXP Semiconductors, LPC1112FHN33/203,5 Datasheet - Page 495

• Manufacturer Part Number: LPC1112FHN33/203,5
• Description: ARM Microcontrollers - MCU Cortex-M0 16kB flash up to 4 kB SRAM
• Manufacturer: NXP Semiconductors

Specifications of LPC1112FHN33/203,5

• Rohs: yes
• Core: ARM Cortex M0
• Processor Series: LPC1112
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 16 KB
• Data Ram Size: 4 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.8 V to 3.6 V
• Operating Temperature Range: - 65 C to + 150 C
• Package / Case: HVQFN-33
• Mounting Style: SMD/SMT
• Factory Pack Quantity: 260

NXP Semiconductors
UM10398
User manual
28.5.7.10.5 Examples
28.5.7.12.1 Syntax
28.5.7.11.1 Syntax
28.5.7.11.2 Operation
28.5.7.11.3 Restrictions
28.5.7.11.4 Condition flags
28.5.7.11.5 Examples
28.5.7.12 WFI
28.5.7.11 WFE
Wait For Event.
Remark: The WFE instruction is not implemented on the LPC111x/LPC11Cxx
WFE
If the event register is 0, WFE suspends execution until one of the following events
occurs:
If the event register is 1, WFE clears it to 0 and completes immediately.
For more information see
Remark: WFE is intended for power saving only. When writing software assume that
WFE might behave as NOP.
There are no restrictions.
This instruction does not change the flags.
Wait for Interrupt.
WFI
•
•
•
•
SVC #0x32 ; Supervisor Call (SVC handler can extract the immediate value
WFE ; Wait for event
an exception, unless masked by the exception mask registers or the current priority
level
an exception enters the Pending state, if SEVONPEND in the System Control
Register is set
a Debug Entry request, if debug is enabled
an event signaled by a peripheral or another processor in a multiprocessor system
using the SEV instruction.
; by locating it via the stacked PC)
Chapter 28: LPC111x/LPC11Cxx Appendix: ARM Cortex-M0 reference
All information provided in this document is subject to legal disclaimers.
Rev. 12 — 24 September 2012
Section
28–28.4.5.
UM10398
© NXP B.V. 2012. All rights reserved.
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