LPC1112FHN33/203,5 NXP Semiconductors, LPC1112FHN33/203,5 Datasheet - Page 470

• Manufacturer Part Number: LPC1112FHN33/203,5
• Description: ARM Microcontrollers - MCU Cortex-M0 16kB flash up to 4 kB SRAM
• Manufacturer: NXP Semiconductors

Specifications of LPC1112FHN33/203,5

• Rohs: yes
• Core: ARM Cortex M0
• Processor Series: LPC1112
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 16 KB
• Data Ram Size: 4 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.8 V to 3.6 V
• Operating Temperature Range: - 65 C to + 150 C
• Package / Case: HVQFN-33
• Mounting Style: SMD/SMT
• Factory Pack Quantity: 260

NXP Semiconductors
UM10398
User manual
Fig 105. ROR #3
28.5.3.3.4 ROR
28.5.3.4 Address alignment
28.5.3.5 PC-relative expressions
Rotate right by n bits moves the left-hand 32-n bits of the register Rm, to the right by n
places, into the right-hand 32-n bits of the result, and it moves the right-hand n bits of the
register into the left-hand n bits of the result. See
When the instruction is RORS the carry flag is updated to the last bit rotation, bit[n-1], of
the register Rm.
Remark:
An aligned access is an operation where a word-aligned address is used for a word, or
multiple word access, or where a halfword-aligned address is used for a halfword access.
Byte accesses are always aligned.
There is no support for unaligned accesses on the Cortex-M0 processor. Any attempt to
perform an unaligned memory access operation results in a HardFault exception.
A PC-relative expression or label is a symbol that represents the address of an instruction
or literal data. It is represented in the instruction as the PC value plus or minus a numeric
offset. The assembler calculates the required offset from the label and the address of the
current instruction. If the offset is too big, the assembler produces an error.
Remark:
•
•
•
•
If n is 32, then the value of the result is same as the value in Rm, and if the carry flag
is updated, it is updated to bit[31] of Rm.
ROR
ROR
For most instructions, the value of the PC is the address of the current instruction plus
4 bytes.
Your assembler might permit other syntaxes for PC-relative expressions, such as a
label plus or minus a number, or an expression of the form [PC, #imm].
with shift length, n, greater than 32 is the same as
with shift length n-32.
Chapter 28: LPC111x/LPC11Cxx Appendix: ARM Cortex-M0 reference
All information provided in this document is subject to legal disclaimers.
Rev. 12 — 24 September 2012
Figure
28–105.
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