ALXD800EEXJ2VD AMD (ADVANCED MICRO DEVICES), ALXD800EEXJ2VD Datasheet - Page 103

• Manufacturer Part Number: ALXD800EEXJ2VD
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of ALXD800EEXJ2VD

• Operating Temperature (min): 0C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Compliant

CPU Core Register Descriptions
AMD Geode™ LX Processors Data Book
00001901h
00001904h
00001908h
00001910h
00001911h
00001920h
00001921h
00001922h
00001923h
00001924h
00001925h
00001926h
00001927h
00001930h
00001950h
00001951h
00001953h
00001970h
00001971h
00001972h
00001973h
00001976h
00001977h
00001980h
00001981h
00001982h
00001983h
00001A00h
Address
MSR
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
RO
RO
RO
Table 5-13. CPU Core Specific MSRs Summary (Continued)
Register Name
Bus Controller Configuration 1 MSR
(BC_CONFIG1_MSR)
Reserved Status MSR (RSVD_STS_MSR)
MSR Lock MSR (MSR_LOCK_MSR)
Real Time Stamp Counter MSR (RTSC_MSR)
TSC and RTSC Low DWORDs MSR
(RTSC_TSC_MSR)
L2 Cache Configuration MSR (L2_CONFIG_MSR)
L2 Cache Status MSR (L2_STATUS_MSR)
L2 Cache Index MSR (L2_INDEX_MSR)
L2 Cache Data MSR (L2_DATA_MSR)
L2 Cache Tag MSR (L2_TAG_MSR)
L2 Cache Tag with Increment MSR
(L2_TAG_I_MSR)
L2 Cache Built-In Self-Test MSR (L2_BIST_MSR)
L2 Cache Treatment Control MSR
(L2_TRTMNT_CTL_MSR)
Power Mode MSR (PMODE_MSR)
Bus Controller Extended Debug Registers 1 and 0
MSR (BXDR1_BXDR0_MSR)
Bus Controller Extended Debug Registers 3 and 2
MSR (BXDR3_BXDR2_MSR)
Bus Controller Extended Debug Registers 6 and 7
MSR (BXDR6_BXDR7_MSR)
Bus Controller Debug Register 0 MSR
(BDR0_MSR)
Bus Controller Debug Register 1 MSR
(BDR1_MSR)
Bus Controller Debug Register 2 MSR
(BDR2_MSR)
Bus Controller Debug Register 3 MSR
(BDR3_MSR)
Bus Controller Debug Register 6 MSR
(BDR6_MSR)
Bus Controller Debug Register 7 MSR
(BDR7_MSR)
Memory Subsystem Array Control Enable MSR
(MSS_ARRAY_CTL_EN_MSR)
Memory Subsystem Array Control 0 MSR
(MSS_ARRAY_CTL0_MSR)
Memory Subsystem Array Control 1 MSR
(MSS_ARRAY_CTL1_MSR)
Memory Subsystem Array Control 2 MSR
(MSS_ARRAY_CTL2_MSR)
FPU Modes MSR (FP_MODE_MSR)
00000104_820C30C3h
00000000_2010F3C9h
00000000_104823CFh
00000000_0000000Eh
00000000_00000000h
00000000_00000000h
00000000_00000000h
00000000_00000000h
00000000_00000000h
00000000_00000001h
00000000_00000000h
00000000_00000000h
00000000_00000000h
00000000_00000000h
00000000_00000000h
00000000_00000000h
00000000_00000300h
00000000_00000000h
00000000_00000000h
00000000_00000000h
00000000_00000000h
00000000_00000000h
00000000_00000000h
00000000_00000000h
00000000_00000000h
00000000_00000000h
00000000_00000000h
00000000_00000000h
Reset Value
33234C
Reference
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