ALXD800EEXJ2VD AMD (ADVANCED MICRO DEVICES), ALXD800EEXJ2VD Datasheet - Page 413

• Manufacturer Part Number: ALXD800EEXJ2VD
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of ALXD800EEXJ2VD

• Operating Temperature (min): 0C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Compliant

Video Processor Register Descriptions
6.8.1
6.8.1.1
MSR Address
Type
Reset Value
6.8.1.2
MSR Address
Type
Reset Value
AMD Geode™ LX Processors Data Book
63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
63:24
63:32
31:21
18:16
23:8
Bit
7:0
Bit
20
19
Standard GeodeLink™ Device MSRs
GLD Capabilities MSR (GLD_MSR_CAP)
GLD Master Configuration MSR (GLD_MSR_CONFIG)
Name
RSVD
DEV_ID
REV_ID
Name
RSVD (RO)
SP
VIDPRI
MSKCS
GPRI
RSVD
SP
48002000h
RO
00000000_0013F0xxh
48002001h
R/W
00000000_00040E00h
Description
Reserved. Reads back as 0.
Device ID. Identifies device (13F0h).
Revision ID. Identifies device revision. See AMD Geode™ LX Processors Specification
Update document for value.
Description
Reserved (Read Only). Reads back as 0.
Spares. Bits are read/write, but have no function.
Video Priority. Sets the video priority level to the video generator. If this bit is set the
video stream will be put in high priority mode.
Mask Palette Chip Select Fix. If this bit is set, the fix for the chip select bug in the pal-
ette RAM is inactivated and the chip select remains active if the bypass both is not set. If
this bit is clear, then the chip select is throttled on individual accesses to the RAM.
GLIU Master Priority. 000 in this field sets the Video Processor module at the lowest
GLIU priority and 111 sets the Video Processor module at the highest GLIU priority.
GLD_MSR_CONFIG Bit Descriptions
GLD_MSR_CONFIG Register Map
GLD_MSR_CAP Bit Descriptions
GLD_MSR_CAP Register Map
GPRI
DEV_ID
RSVD
RSVD
DIV
9
9
8
8
33234C
FMTBO
7
7
6
6
5
5
FMT
REV_ID
4
4
3
3
2
2
PID
1
1
413
0
0