ALXD800EEXJ2VD AMD (ADVANCED MICRO DEVICES), ALXD800EEXJ2VD Datasheet - Page 662

• Manufacturer Part Number: ALXD800EEXJ2VD
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of ALXD800EEXJ2VD

• Operating Temperature (min): 0C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Compliant

662
FDECSTP Decrement Stack pointer
FDIV Floating Point Divide
FDIVP Floating Point Divide, Pop
FDIVR Floating Point Divide Reversed
FDIVRP Floating Point Divide Reversed, Pop
FIDIV Floating Point Integer Divide
FIDIVR Floating Point Integer Divide Reversed
FFREE Free Floating Point Register
FINCSTP Increment Stack Pointer
FINIT Initialize FPU
FNINIT Initialize FPU
FLD Load Data to FPU Register
FBLD Load Packed BCD Data to FPU Register
FILD Load Integer Data to FPU Register
FLD1 Load Floating Const.= 1.0
FLDCW Load FPU Mode Control Register
FLDENV Load FPU Environment
FLDL2E Load Floating Const.= Log2(e)
FLDL2T Load Floating Const.= Log2(10)
FLDLG2 Load Floating Const.= Log10(2)
FLDLN2 Load Floating Const.= Ln(2)
FLDPI Load Floating Const.= π
FLDZ Load Floating Const.= 0.0
FMUL Floating Point Multiply
FMULP Floating Point Multiply & Pop
FIMUL Floating Point Integer Multiply
FNOP No Operation
Top of Stack
80-bit Register
64-bit Real
32-bit Real
Top of Stack
80-bit Register
64-bit Real
32-bit Real
32-bit Integer
16-bit Integer
32-bit Integer
16-bit Integer
Top of Stack
80-bit Real
64-bit Real
32-bit Real
64-bit Integer
32-bit Integer
16-bit Integer
Top of Stack
80-bit Register
64-bit Real
32-bit Real
32-bit Integer
16-bit Integer
FPU Instruction
33234C
Table 8-29. FPU Instruction Set (Continued)
D9 F6
DC [1111 1 n]
D8 [1111 0 n]
DC [mod 110 r/m]
D8 [mod 110 r/m]
DE [1111 1 n]
DC [1111 0 n]
D8 [1111 1 n]
DC [mod 111 r/m]
D8 [mod 111 r/m]
DE [1111 0 n]
DA [mod 110 r/m]
DE [mod 110 r/m]
DA [mod 111 r/m]
DE [mod 111 r/m]
DD [1100 0 n]
D9 F7
(9B)DB E3
DB E3
D9 [1100 0 n]
DB [mod 101 /m]
DD [mod 000 r/m]
D9 [mod 000 r/m]
DF [mod 100 r/m]
DF [mod 101 r/m]
DB [mod 000 r/m]
DF [mod 000 r/m]
D9 E8
D9 [mod 101 r/m]
D9 [mod 100 r/m]
D9 EA
D9 E9
D9 EC
D9 ED
D9 EB
D9 EE
DC [1100 1 n]
D8 [1100 1 n]
DC [mod 001 r/m]
D8 [mod 001 r/m]
DE [1100 1 n]
DA [mod 001 r/m]
DE [mod 001 r/m]
D9 D0
Opcode
Decrement top of stack pointer
ST(n) <--- ST(n) / TOS
TOS <--- TOS / ST(n)
TOS <--- TOS / M.DR
TOS <--- TOS / M.SR
ST(n) <--- ST(n) / TOS; then pop TOS
TOS <--- ST(n) / TOS
ST(n) <--- TOS / ST(n)
TOS <--- M.DR / TOS
TOS <--- M.SR / TOS
ST(n) <--- TOS / ST(n); then pop TOS
TOS <--- TOS / M.SI
TOS <--- TOS / M.WI
TOS <--- M.SI / TOS
TOS <--- M.WI / TOS
TAG(n) <--- Empty
Increment top-of-stack pointer
Wait, then initialize
Initialize
Push ST(n) onto stack
Push M.XR onto stack
Push M.DR onto stack
Push M.SR onto stack
Push M.BCD onto stack
Push M.LI onto stack
Push M.SI onto stack
Push M.WI onto stack
Push 1.0 onto stack
Ctl Word <--- Memory
Env Regs <--- Memory
Push Log
Push Log
Push Log
Push Log
Push
Push 0.0 onto stack
ST(n) <--- ST(n) × TOS
TOS <--- TOS × ST(n)
TOS <--- TOS × M.DR
TOS <--- TOS × M.SR
ST(n) <--- ST(n)
TOS <--- TOS
TOS <--- TOS
No Operation
π
onto stack
2
2
10
e
(e) onto stack
(10) onto stack
(2) onto stack
(2) onto stack
×
×
×
M.SI
M.WI
Operation
TOS; then pop TOS
AMD Geode™ LX Processors Data Book
(or extended)
Single/Dbl
Clock Ct
12/47
12/47
12/47
12/47
12/47
12/47
12/47
12/47
12/47
12/47
13/48
13/48
13/48
13/48
1/10
1/10
1/10
1/10
1/10
2/11
2/11
Instruction Set
28
1
1
1
1
1
1
1
1
1
1
1
4
1
1
1
1
1
1
1
1
1
1
Notes
3
3
3
2
2
3
3
3
3
3
3
3
3
3
3
3
3
3
3