ALXD800EEXJ2VD AMD (ADVANCED MICRO DEVICES), ALXD800EEXJ2VD Datasheet - Page 170

• Manufacturer Part Number: ALXD800EEXJ2VD
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of ALXD800EEXJ2VD

• Operating Temperature (min): 0C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Compliant

5.5.2.74 x86 Control Registers MSRs (CR1, CR2, CR3, CR4)
These are the standard x86 Control Registers CR1, CR2, CR3, and CR4. CR0 is located at MSR 00001420h (see Section
5.5.2.50 on page 147). The contents of CR0-CR4 should only be accessed using the MOV instruction. They are mentioned
here for completeness only. See Section 5.4.1 “Control Registers” on page 93 for bit descriptions
x86 Control Register 1 MSR (CR1_MSR)
MSR Address
Type
Reset Value
x86 Control Register 2 MSR (CR2_MSR)
MSR Address
Type
Reset Value
5.5.2.75 Data Cache Index MSR (DC_INDEX_MSR)
MSR Address
Type
Reset Value
170
63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
63:18
17:16
15:11
10:4
Bit
3:0
Name
RSVD (RO)
DC_DSEL
RSVD (RO)
DC_LINE
DC_WAY
00001881h
R/W
00000000_xxxxxxxxh
00001882h
R/W
00000000_xxxxxxxxh
00001890h
R/W
00000000_00000000h
33234C
RSVD
Description
Reserved (Read Only).
Data QWORD Select. Determines which QWORD in a cache line is accessed by a read
or a write to DC_DATA_MSR (MSR 00001891h). DC_DSEL increments on accesses to
DC_DATA and resets to 0 on accesses to DC_TAG_MSR (MSR 00001892h) or
DC_TAG_I_MSR (MSR 00001893h).
Reserved (Read Only).
Cache Line Select. Forms the high 7 bits of a 9-bit counter. The DC_WAY field (bits
[1:0]) forms the low 2 bits of the counter. This field increments when DC_WAY overflows
on an access to DC_TAG_I_MSR (MSR 00001893h).
Cache Way Select. Forms the low 2 bits of a 9-bit counter. The DC_LINE field (bits
[10:4]) forms the high 7 bits of the counter. This field post-increments on accesses to
DC_TAG_I_MSR (MSR 00001893h).
DC_INDEX_MSR Bit Descriptions
DC_INDEX_MSR Register Map
RSVD
x86 Control Register 3 MSR (CR3_MSR)
MSR Address
Type
Reset Value
x86 Control Register 4 MSR (CR4_MSR)
MSR Address
Type
Reset Value
RSVD
00001883h
R/W
00000000_xxxxxxxxh
00001884h
R/W
00000000_xxxxxxxxh
AMD Geode™ LX Processors Data Book
9
8
DC_LINE
CPU Core Register Descriptions
7
6
5
4
3
DC_WAY
2
1
0