ALXD800EEXJ2VD AMD (ADVANCED MICRO DEVICES), ALXD800EEXJ2VD Datasheet - Page 80

• Manufacturer Part Number: ALXD800EEXJ2VD
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of ALXD800EEXJ2VD

• Operating Temperature (min): 0C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Compliant

4.2.4.2
GLIU0
MSR Address
Type
Reset Value
See Table 4.1.3.1 "Memory Routing and Translation" on page 47 for details on the descriptor usage.
80
63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
63:61
59:40
39:20
PDID1
19:0
Bit
60
P2D Base Mask Offset Descriptor (P2D_BMO)
Name
PDID1
PCMP_BIZ
POFFSET
PBASE
PMASK
PBASE
P2D_BMO[1:0]
10000026h-10000027h
R/W
00000FF0_FFF00000h
33234C
Description
Descriptor Destination ID. These bits define which Port to route the request to, if it is a
‘hit’ based on the other settings in this register.
000: Port 0 = GLIU0: GLIU; GLIU1: GLIU
001: Port 1 = GLIU0: GLMC; GLIU1: Interface to GLIU0
010: Port 2 = GLIU0: Interface to GLIU1; GLIU1: VP
011: Port 3 = GLIU0: CPU Core; GLIU1: GLCP
100: Port 4 = GLIU0: DC; GLIU1: GLPCI
101: Port 5 = GLIU0: GP; GLIU1: VIP
110: Port 6 = GLIU0: Not Used; GLIU1: SB (Security Block)
111: Port 7 = GLIU0: Not Used; GLIU1: Not Used
Compare Bizzaro Flag.
0: Consider only transactions whose Bizzaro flag is low as a potentially valid address hit.
1: Consider only transactions whose Bizarro flag is high as a potentially valid address hit.
Physical Memory Address 2s Comp Offset. 2s complement offset that is added to
physical address on a hit.
Physical Memory Address Base. These bits form the matching value against which the
masked value of the physical address, bits [31:12] are directly compared. If a match is
found, then a “hit’ is declared, depending on the setting of the Bizzaro flag comparator.
Physical Memory Address Mask. These bits are used to mask address bits [31:12] for
the purposes of this ‘hit’ detection.
A low Bizarro flag indicates a normal transaction cycle such as a memory or I/O.
A high Bizzaro flag indicates a ‘special’ transaction, such as a PCI Shutdown or Halt
cycle.
P2D_BMO Bit Descriptions
P2D_BMO Register Map
POFFSET
PMASK
AMD Geode™ LX Processors Data Book
9
8
7
GLIU Register Descriptions
6
5
PBASE
4
3
2
1
0