ALXD800EEXJ2VD AMD (ADVANCED MICRO DEVICES), ALXD800EEXJ2VD Datasheet - Page 544

• Manufacturer Part Number: ALXD800EEXJ2VD
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of ALXD800EEXJ2VD

• Operating Temperature (min): 0C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Compliant

6.14.2.5 GLCP Debug Output from Chip (GLCP_DBGOUT)
MSR Address
Type
Reset Value
This register is revserved for internal use by AMD and should not be written to.
6.14.2.6 GLCP Processor Status (GLCP_PROCSTAT)
MSR Address
Type
Reset Value
Note that the names of these bits have the read status data before the "_" and the write behavior after it.
544
63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
63:7
Bit
6
5
4
3
2
1
0
Name
RSVD
RESET_NONE
STOPCLK_ NONE
GLACT_UNSTALL
GLCPSTALL_ DMI
STALL_ SMI
SUSP_ STOPCLK
DMI_STALL
4C00000Ch
R/W
00000000 00000000h
4C00000Dh
R/W
Bootstrap Dependant
33234C
Description
Reserved. Writing these bits has no effect.
Reset Status. When read, this bit is high if a hard or soft reset to the Geode™ LX
processor has occurred since this register was last read. Writing this bit has no
effect.
Stop Clock Status. When read, this bit is high if a GLCP stop clock action has
occurred since this register was last read. Writing this bit has no effect.
GLIU1 Debug Action Status. When read, this bit is high if the GLCP has triggered
a GLIU1 debug action since this register was last read. Writing this bit high unstalls
the processor.
GLCP Stall Status. When read, this bit is high if the GLCP is stalling the CPU.
Writing this bit high causes a GLCP DMI to the processor.
CPU Stall Status. When read, this bit is high if the CPU is stalled for any reason.
Writing this bit high causes a GLCP SMI to the processor. Bit 1 of GLD_MSR_SMI
(MSR 4C000002h) gets set by this SMI and an SMI is triggered, assuming appro-
priate SMI enable settings.
CPU Suspended Stop Clock Status. When read, this bit is high if the CPU has
suspended execution for any reason since this register was last read. Writing this
bit high causes the GLCP to stop all clocks identified in GLCP_CLKDISABLE
(MSR 4C000012h).
CPU DMI Stall Status. When read, this bit is high if the CPU is in DMI mode. Writ-
ing this bit high causes the GLCP to “DEBUG_STALL” the processor.
GLCP_PROCSTAT Bit Descriptions
GLCP_PROCSTAT Register Map
RSVD
RSVD
GeodeLink™ Control Processor Register Descriptions
AMD Geode™ LX Processors Data Book
9
8
7
6
5
4
3
2
1
0