ALXD800EEXJ2VD AMD (ADVANCED MICRO DEVICES), ALXD800EEXJ2VD Datasheet - Page 673
ALXD800EEXJ2VD
Manufacturer Part Number
ALXD800EEXJ2VD
Description
Manufacturer
AMD (ADVANCED MICRO DEVICES)
Datasheet
1.ALXD800EEXJ2VD.pdf
(675 pages)
Specifications of ALXD800EEXJ2VD
Operating Temperature (min)
0C
Operating Temperature (max)
85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Compliant
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Appendix A: Data Book Revision History
A.2
This document is a report of the revision/creation process of the data book for the AMD Geode™ LX processors. Any revi-
sion (i.e., additions, deletions, parameter corrections, etc.) are recorded in the table(s) below.
AMD Geode™ LX Processors Data Book
Section
Section 1.0 "Over-
view"
Section 3.0 "Signal
Definitions"
Section 5.5 "CPU Core
Register Descrip-
tions"
Section 6.1
"GeodeLink™ Mem-
ory Controller"
Section 6.12 "Secu-
rity Block Register
Descriptions"
Section 6.13
"GeodeLink™ Control
Processor"
Section 6.15
"GeodeLink™ PCI
Bridge"
Section 7.0 "Electrical
Specifications"
Section 8.0 "Instruc-
tion Set"
0.5 (September 2004)
0.9 (January 2005)
B (October 2005)
0.1 (April 2004)
C (April 2006)
A (May 2005)
(PDF Date)
Revision #
Data Book Revision History
Revisions / Comments
Advance Information.
Added data registers descriptions, electrical specifications, and package specification sec-
tions. Still preliminary and in the review/proofing process.
Added functional descriptions and other corrections.
Engineering edits.
Majority of edits to Electrical section.
Engineering edits. See Table A-3 for details.
Revision
• In Section 1.2 on page 12 under GeodeLink Memory Controller, changed maximum
• RESET# was incorrectly labeled as I/O. Changed to input only in:
• Corrected Table 3-3 on page 24 - Descriptions were switched for pins PW1 and PW0.
• Section 3.4.2 on page 34 - Changed description of VLPF from 1000 pf to VAV
• Section 3.4.8 on page 41 - Added pull down to type column of VID[7:0].
• Changed MSR 00001700h[6] (Section 5.5.2.51 on page 148) from L0WE to RSVD.
• Changed first bullet in Features on page 209 from “Supports up to 222 MT/S (million
• Section 6.12.3.23 on page 528 (SB Memory Offset 80Ch[2:0]) - Edited the following
• Edited Figure 6-56 on page 532.
• Added last two paragraphs to Section 6.15.4 on page 565.
• Added LX 800 to the second V
• Edited most values in Table 7-3 on page 598.
• Added entry for OFFSET -34 in Section 8.3.4.7 on page 646.
supported devices from 32 to 16.
— Figure 3-1 on page 21.
— Table 3-5 on page 26.
— Section 3.4.5 on page 37.
to VAV
transfers per second) DDR SDRAMs”, to “Supports up to 400 MT/S (million transfers per
second) DDR SDRAMs”.
sentence of the description: “If any of these bits are reset, write operations are blocked
forever.” Added “forever” to the end of the sentence.
LX 800.
SS
Table A-3. Edits to Current Revision
.
Table A-2. Revision History
CORE
row in Table 7-2 on page 596 - both rows apply to the
33234C
SS
to 220 pf
673
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