ALXD800EEXJ2VD AMD (ADVANCED MICRO DEVICES), ALXD800EEXJ2VD Datasheet - Page 514

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ALXD800EEXJ2VD

Manufacturer Part Number
ALXD800EEXJ2VD
Description
Manufacturer
AMD (ADVANCED MICRO DEVICES)
Datasheet

Specifications of ALXD800EEXJ2VD

Operating Temperature (min)
0C
Operating Temperature (max)
85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Compliant

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6.12.1.5 GLD Power Management MSR (GLD_MSR_PM)
MSR Address
Type
Reset Value
514
63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
31:3
63:5
Bit
2:1
Bit
32
4
3
0
4
3
2
1
0
RSVD
Name
AES_ERR_
STATUS
RB_ERR_
MASK
RA_ERR_
MASK
RSVD
AES_ERR_
MASK
Name
RSVD
PMD2
RSVD
PMD1
RSVD
PMD0
58002004h
R/W
00000000_00000015h
33234C
Description
AES Error Status. Reserved Type. This bit is set if the module receives a transaction
identified with a reserved transaction type. This implies a hardware error.
0: AES Error not pending.
1: AES Error pending.
Writing a 1 to this bit clears the status.
Reserved.
Response B Error Mask. When set, this bit masks the Response B Error (bit 36) and
prevents generation of the error output. When cleared, the error is enabled and asser-
tion of Response B Error will generate an error.
Response A Error Mask. When set, this bit masks the Response A Error (bit 35) and
prevents generation of the error output. When cleared, the error is enabled and asser-
tion of Response A Error will generate an error.
Reserved.
AES Error Mask. Reserved Type.
0: Unmask the Error (Enabled).
1: Mask the Error (Disabled).
Description
Reserved.
Power Mode 2 (EEPROM).
0: Disable clock gating. Clocks are always ON.
1: Enable active hardware clock gating.
Reserved.
Power Mode 1 (AES core, GLIU clock/2).
0: Disable clock gating. Clocks are always ON.
1: Enable active hardware clock gating.
Reserved.
Power Mode 0 (GLIU clock).
0: Disable clock gating. Clocks are always ON.
1: Enable active hardware clock gating.
GLD_MSR_Error Bit Descriptions
GLD_MSR_PM Bit Descriptions
GLD_MSR_PM Register Map
RSVD
RSVD
AMD Geode™ LX Processors Data Book
9
Security Block Register Descriptions
8
7
6
5
4
3
2
1
0

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