ALXD800EEXJ2VD AMD (ADVANCED MICRO DEVICES), ALXD800EEXJ2VD Datasheet - Page 270

• Manufacturer Part Number: ALXD800EEXJ2VD
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of ALXD800EEXJ2VD

• Operating Temperature (min): 0C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Compliant

6.4.2.20 Command Write (GP_CMD_WRITE)
GP Memory Offset 5Ch
Type
Reset Value
This register points to the next location to be written with command buffer data from the processor. After the processor
writes out a complete command buffer starting at this address, it should write to this register to update the value to point to
the next location to be written. This write is what queues the GP that there is command buffer data that needs to be fetched
and activates the command buffer logic within GP. If the Wrap bit is set in a command buffer control WORD, this register
should be written with the same value as that found in GP_CMD_TOP (GP Memory Offset 50h) after the CPU has com-
pleted loading the command buffer in memory.
6.4.2.21 Offset (GP_CH3_OFFSET)
GP Memory Offset 60h
Type
Reset Value
The GP_CH3_OFFSET register is used during a BLT to give a starting location for the BLT data in the channel 3 region of
memory. The register consists of two fields to compose the address, the OFFSET and Nibble Select. The OFFSET field is
a pointer, which when added to the channel 3 base address, gives the memory location of the byte containing the first pixel
of the BLT. As in the destination and source offsets, this value must be aligned correctly for BLT direction and pixel depth.
When host source data is used, the two LSBs of OFFSET must still be initialized with the byte location of the first source
pixel in the host source data stream. Nibble Select is used when the source is 4 bpp, to give an offset within the specified
byte to the nibble representing the starting pixel. Both the OFFSET LSBs and Nibble Select are used to index into the first
DWORD of every new line of source data.
For a rotation of 90° counterclockwise, the offset should point to the top rightmost byte of the source bitmap. For a rotation
of 90° clockwise, the offset should point to the bottom leftmost byte of the source bitmap. For a rotation of 180°, the offset
should point to the opposite corner from that pointed to by the destination offset (e.g., If GP_BLT_MODE (GP Memory Off-
set 40h) indicates a left to right, top to bottom fill, then the destination offset should point to the upper left corner and the
channel 3 offset should point to the bottom right most byte of the source bitmap).
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31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
YLSBS
31:24
23:0
Bit
RSVD
Name
RSVD
CMD_WRITE
XLSBS
R/W
00000000h
R/W
00000000h
33234C
N
Description
Reserved. Read returns 0.
Command Write. Pointer to where the next command buffer will be written in the com-
mand buffer region.
GP_CMD_WRITE Bit Descriptions
GP_CH3_OFFSET Register Map
GP_CMD_WRITE Register Map
CMD_WRITE
OFFSET
Graphics Processor Register Definitions
AMD Geode™ LX Processors Data Book
9
9
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
0
0