ALXD800EEXJ2VD AMD (ADVANCED MICRO DEVICES), ALXD800EEXJ2VD Datasheet - Page 247

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ALXD800EEXJ2VD

Manufacturer Part Number
ALXD800EEXJ2VD
Description
Manufacturer
AMD (ADVANCED MICRO DEVICES)
Datasheet

Specifications of ALXD800EEXJ2VD

Operating Temperature (min)
0C
Operating Temperature (max)
85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Compliant

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Graphics Processor
6.3.7
The new channel 3 hardware provides the capability of per-
forming BLTs with 64 pixel color patterns at all color
depths. To setup this mode, software first loads the pattern
data into the LUT beginning at address 100h The least sig-
nificant byte of this first DWORD contains the upper left
most pixel of the pattern. For 8-bpp mode, the most signifi-
cant byte of the next DWORD contains the upper right
most pixel of the pattern. In 16-bpp mode, the upper right
most pixel is contained in the most significant bytes of the
fourth DWORD, and for 32-bpp mode, the eighth DWORD
contains the upper right most pixel. The next line of the pat-
tern begins at the DWORD that follows the last pixel of the
previous line, such that the pattern is packed into the space
required to hold it. So for 8-bpp mode, the top left pixel is in
the least significant byte of the DWORD at address 100h in
the LUT, the top right pixel is in the most significant byte of
the DWORD at address 101. The bottom left pixel is in the
least significant byte of the DWORD at address 10Eh and
the bottom right pixel is in the most significant byte of the
DWORD at address 10Fh.
To enable this mode, the EN and PM bits should be set in
the GP_CH3_MODE_STR register (GP Memory Offset
64h[31, 21]): EN, PM. The The PS, HS, RO, X, and Y bits
should not be set in the GP_CH3_MODE_STR register.
The BPP/FMT bits in the GP_CH3_MODE_STR register
(bits [27:24]) indicate the color depth of the pattern data. If
this
AMD Geode™ LX Processors Data Book
24 25 26 27 28 29 30 31 16 17 18 19 20 21 22 23 8
0
Format
Right Pixel Data (3:3:2)
4:4:4:4
1:5:5:5
5:6:5
1
does
Alpha/Unused
2
8x8 Color Patterns
Byte 3
Byte 3
Byte 3
3
not
Right Most Pixel
A
4
Alpha
match
5
Red
6
Red
Byte 3
the
7
0
Red
Right Pixel Data
BPP/FMT
Table 6-19. 32 bpp 8:8:8:8 Color Data Format
1
Table 6-21. 8 bpp 3:3:2 Color Data Format
Green
Table 6-22. Monochrome Data Format
Table 6-20. 16 bpp Color Data Format
2
Pixel 2 Data
Green
Byte 2
Byte 2
Byte 2
3
Red
Green
bits
4
5
in
Byte 2
6
the
Blue
Blue
7
Blue
0
GP_RASTER_MODE
38h[31:28]), then the pattern is translated to the depth
specified by the GP_RASTER_MODE register.
6.3.8
When called for by the raster operation or alpha blender,
software should set the source required bits in the
GP_BLT_MODE register (GP Memory Offset 40h) so that
source data is fetched from the frame buffer memory or
can be written by the host to the GP_HST_SRC register
(GP Memory Offset 48h). Regardless of its origination,
source data can either be monochrome (expanded to two
colors) or color. The hardware aligns the incoming source
data to the appropriate pixel lanes for writing to the destina-
tion. Source data is only used when in BLT mode. In vector
mode, GP_SRC_COLOR_FG (GP Memory Offset 10h) is
forced onto the source channel.
6.3.8.1
The Graphics Processor expects to see the left-most pixels
on the screen in the least significant bytes of the DWORD
and the right-most pixels in the most significant bytes. For
monochrome data within a byte, the left-most pixels are in
the most significant bits of the byte, and the right-most pix-
els are in the least significant bits. These formats are
shown more clearly in Table 6-19, Table 6-20, Table 6-21,
and Table 6-22.
1
9 10 11 12 13 14 15 0
A
2
Pixel 1 Data
Alpha
Byte 1
Byte 1
Byte 1
Green
Source Data
Source Data Formats
3
Red
4
Red
Byte 1
5
6
Red
Left Pixel Data
register
7
33234C
Left Most Pixel
Green
0
Green
Left Pixel Data (3:3:2)
1
1
(GP
Green
2
2
Byte 0
Byte 0
Byte 0
3
3
Blue
Memory
Byte 0
4
4
Blue
Blue
5
5
Blue
6
6
Offset
247
7
7

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