ALXD800EEXJ2VD AMD (ADVANCED MICRO DEVICES), ALXD800EEXJ2VD Datasheet - Page 400

• Manufacturer Part Number: ALXD800EEXJ2VD
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of ALXD800EEXJ2VD

• Operating Temperature (min): 0C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Compliant

6.7.6.5
BT.656 Mode
BT.656 is the basic standard that specifies the encoding of
the control lines into the data bus. In this mode the sepa-
rate control lines are encoded into the data bus as speci-
fied by Recommendation ITU-R BT.656.
The T bit is specified in BT.656 as a constant logic 1. The F
bit indicates Field - 1 for even (also called Field 2), 0 for
odd (Field 1). The V bit indicates Vertical Blanking. The H
bit indicates Horizontal Blanking. Bits P3 through P0 are
protection bits used to detect and correct single-bit errors.
The bits are defined as follows:
P3 = (V + H) + ~T
P2 = (F + H) + ~T
P1 = (F + V) + ~T
P0 = (F + V) + H
Using the above formulas, the bit values are listed in Table
6-63.
400
T
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
Status Word
Parameter
Preamble
F
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
Table 6-63. Protection Bit Values
Operating Modes
V
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
H
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
33234C
P3
D7
1
0
0
1
1
0
0
1
0
1
1
0
0
1
1
0
1
0
0
T
P2
1
0
1
0
0
1
0
1
0
1
0
1
1
0
1
0
P1
D6
1
1
0
0
0
0
1
1
0
0
1
1
1
1
0
0
F
1
0
0
Table 6-62. SAV/EAV Sequence
P0
0
1
1
0
1
0
0
1
0
1
1
0
1
0
0
1
D5
Hex
V
AB
DA
EC
1
0
0
0E
9D
B6
C7
13
25
38
49
54
62
7F
80
F1
Each line begins with a Start of Active Video (SAV) header,
and ends with an End of Active Video (EAV) header. Each
of these are four-byte sequences beginning with FF, 00,
00. The fourth byte of the header provides important infor-
mation about this line. The bit format of the SAV and EAV
headers is shown in Table 6-62.
VIP 1.1 Compatible Mode
VIP 1.1 compatible mode builds on CBT.656 mode with the
following changes/additions:
D4
H
1
0
0
— Video Flags T, F, and V can only be changed in the
— Task bit is used to indicate VBI data within the video
— P3-P0 are ignored.
EAV code. During vertical blanking there must be a
minimum of one SAV/EAV scan line in order to
convey the updated T, F, and V bits.
stream (T = 0 for VBI Data, T = 1 for active video).
D3
P3
1
0
0
AMD Geode™ LX Processors Data Book
D2
P2
1
0
0
D1
P1
1
0
0
Video Processor
D0
P0
1
0
0