ALXD800EEXJ2VD AMD (ADVANCED MICRO DEVICES), ALXD800EEXJ2VD Datasheet - Page 455

• Manufacturer Part Number: ALXD800EEXJ2VD
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of ALXD800EEXJ2VD

• Operating Temperature (min): 0C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Compliant

Video Processor Register Descriptions
6.8.3.48 Dither Memory Data (DMD)
VP Memory Offset 450h
Type
Reset Value
6.8.3.49 Panel CRC Signature (CRC)
VP Memory Offset 458h
Type
Reset Value
AMD Geode™ LX Processors Data Book
63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
63:32
31:0
63:9
Bit
Bit
8:3
2
1
0
Name
RSVD (RO)
RDAT
Name
RSVD (RO)
FRCT (RO)
SIGVAL (RO)
SIGFR
SIGEN
R/W
00000000_00000000h
R/W
00000000_00000000h
Description
Reserved (Read Only). Reads back as 0.
RAM Data. This 32-bit field contains the read or write data for the RAM access.
Description
Reserved (Read Only). Reads back as 0.
Frame Count (Read Only). Represents the frame count, which is an index for the gener-
ated signature for that frame.
Signature Valid (Read Only). If this bit is set, the signature operation has completed
and the signature may be safely read from the 32-Bit Panel CRC Register (VSP Memory
Offset 468h).
Signature Free Run. If this bit is high, with signature enabled (bit 0 = 1), the signature
generator captures data continuously across multiple frames. This bit may be set high
when the signature is started, then later set low, which causes the signature generation
process to stop at the end of the current frame.
0: Capture signature for only one frame.
1: Free run across multiple frames.
Signature Enable. Enables/disables signature capture.
1: Enable signature capture.
0: Disable signature capture.
RSVD
DMD Bit Descriptions
CRC Bit Descriptions
DMD Register Map
CRC Register Map
RSVD
RSVD
RDAT
9
9
8
8
33234C
7
7
FRCT
6
6
5
5
4
4
3
3
2
2
1
1
455
0
0