ALXD800EEXJ2VD AMD (ADVANCED MICRO DEVICES), ALXD800EEXJ2VD Datasheet - Page 321

• Manufacturer Part Number: ALXD800EEXJ2VD
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of ALXD800EEXJ2VD

• Operating Temperature (min): 0C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Compliant

Display Controller Register Descriptions
6.6.4.4
DC Memory Offset 020h
Type
Reset Value
This register specifies the offset at which the video Y (YUV 4:2:0) or YUV (YUV 4:2:2) buffer starts.
The upper 4 bits of this register are for the field count mechanism. This mechanism, which did not exist on previous Geode
processors, allows the DC to fetch multiple fields or frames of VIP data without requiring software intervention to move the
offset. This mechanism has the constraint that the buffers for multiple video frames must be contiguous in memory. (The
VIP hardware will meet this constraint.)
Settings written to this register do not take effect until the start of the following frame or interlaced field.
6.6.4.5
DC Memory Offset 024h
Type
Reset Value
This register specifies the offset at which the video U (YUV 4:2:0) buffer starts.
Settings written to this register do not take effect until the start of the following frame or interlaced field.
AMD Geode™ LX Processors Data Book
FRAME_COUNT
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
31:28
27:0
Bit
RSVD
DC Video Y Buffer Start Address Offset (DC_VID_Y_ST_OFFSET)
DC Video U Buffer Start Address Offset (DC_VID_U_ST_OFFSET)
Name
RSVD
OFFSET
R/W
xxxxxxxxh
R/W
xxxxxxxxh
Description
Reserved. Reserved for field count mechanism
Video Y Buffer Start Offset. This value represents the starting location for Video Y
Buffer. The lower five bits should always be programmed as zero so that the start offset
is aligned to a 32-byte boundary. If YUV 4:2:2 mode is selected (DC Memory Offset 004h
[20] = 0), the Video Y Buffer is used as a singular buffer holding interleaved Y, U and V
data. If YUV 4:2:0 is selected (DC Memory Offset 004h [20] = 1), the Video Y Buffer is
used to hold only Y data while U and V data are stored in separate buffers whose start
offsets are represented in DC_VID_U_ST_OFFSET (DC Memory Offset 024h[27:0]) and
DC_VID_V_ST_OFFSET (DC Memory Offset 028h[27:0]).
DC_VID_Y_ST_OFFSET Bit Descriptions
DC_VID_Y_ST_OFFSET Register Map
DC_VID_U_ST_OFFSET Register Map
OFFSET
OFFSET
9
9
8
8
33234C
7
7
6
6
5
5
4
4
3
3
2
2
0h
1
1
0
321
0
0