ALXD800EEXJ2VD AMD (ADVANCED MICRO DEVICES), ALXD800EEXJ2VD Datasheet - Page 245

• Manufacturer Part Number: ALXD800EEXJ2VD
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of ALXD800EEXJ2VD

• Operating Temperature (min): 0C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Compliant

Graphics Processor
6.3.6.2
Color patterns are enabled by selecting the color pattern
mode in the GP_RASTER_MODE register (GP Memory
Offset 38h). In this mode, both of the GP_PAT_DATA reg-
isters and all six of the GP_PAT_COLOR registers are
combined to provide a total of 256 bits of pattern. The num-
ber of lines that the pattern can hold is dependent upon the
number of bits per pixel. When performing a BLT that
needs a deeper color pattern than is supported (such as
8x8), software is responsible for breaking the BLT into
blocks such that the height of each block does not exceed
the depth of the pattern. After each block is completed,
software must update the pattern registers before continu-
ing with the next block of the BLT. As a result of having a
programmable stride value, it is now possible to reduce the
number of passes required to perform a BLT requiring a
color pattern, by multiplying the stride value by the number
of passes that are required to perform the BLT. For exam-
ple, in 8 bpp mode, where only an 8x4 pattern fits, the
stride value could be doubled such that all of the even lines
AMD Geode™ LX Processors Data Book
GP_PAT_DATA_0[7:0] - 14h
GP_PAT_DATA_0[15:8] - 22h
GP_PAT_DATA_0[23:16] - 41h
GP_PAT_DATA_0[31:24] - 80h
GP_PAT_DATA_1[7:0] - 41h
GP_PAT_DATA_1[15:8] - 22h
GP_PAT_DATA_1[23:16] - 14h
GP_PAT_DATA_1[31:24] - 08h
Color Patterns
Table 6-16. Example of Monochrome Pattern
Bit 7
Bit 6
Bit 5
would be BLTed during the first pass, and all of the odd
lines during the second pass. The pattern registers should
be programmed with the even lines on the first pass and
the odd lines on the second pass, and the Y Offset value
should be the start of the bitmap on the first pass and the
start of the second line of the bitmap on the second pass.
The algorithm can be extended to handle 8x2 and 8x1 pat-
terns in four and eight passes. This only works, however,
when the source and destination are non-overlapping.
When performing an overlapping BLT, it is necessary to fall
back to breaking the BLT into four, two, or one consecutive
lines and reprogramming the pattern registers between
each block.
Pattern transparency is not supported in color pattern
mode.
In 8-bpp mode, there is a total of four lines of pattern, each
line with eight pixels as illustrated in Table 6-17 on page
246
.
Bit 4
Bit 3
33234C
Bit 2
Bit 1
Bit 0
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