ALXD800EEXJ2VD AMD (ADVANCED MICRO DEVICES), ALXD800EEXJ2VD Datasheet - Page 188

• Manufacturer Part Number: ALXD800EEXJ2VD
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of ALXD800EEXJ2VD

• Operating Temperature (min): 0C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Compliant

5.5.2.100 L2 Cache Tag with Increment MSR (L2_TAG_I_MSR)
MSR Address
Type
Reset Value
The L2_TAG_I_MSR has the auto incremented L2 cache tag, MRU and valid bits for diagnostic accesses.
Bit descriptions for this register are the same as for L2_TAG_MSR (MSR 00001924h), except read/write of this register
causes an auto increment on the L2_INDEX_MSR (MSR 00001922h).
5.5.2.101 L2 Cache Built-In Self-Test MSR (L2_BIST_MSR)
MSR Address
Type
Reset Value
L2_BIST_MSR has the L2 cache index for diagnostic accesses.
188
63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
RSVD
63:30
28:13
Bit
29
12
11
Name
RSVD (RO)
BIST_MRU_GO
(RO)
BIST_DATA_
CMP_STAT (RO)
BIST_DATA_GO
(RO)
BIST_TAG_GO_
CMP (RO)
00001925h
R/W
00000000_00000000h
00001926h
R/W
00000000_00000000h
33234C
L2_TAG
BIST_DATA_CMP_STAT
Description
Reserved (Read Only). (Default = 0)
L2 Cache Most Recently Used BIST Result (Read Only).
0: Fail. (Default)
1: Pass.
L2 Cache Data BIST Result (Read Only). One for each passed comparator - 16
total. (Default = 0)
L2 Cache Data BIST Result (Read Only).
0: Fail. (Default)
1: Pass.
L2 Cache Tag Comparator BIST Result (Read Only).
0: Fail. (Default)
1: Pass.
L2_BIST_MSR Bit Descriptions
L2_TAG_I_MSR Register Map
L2_BIST_MSR Register Map
RSVD
RSVD
RSVD
AMD Geode™ LX Processors Data Book
9
9
8
8
CPU Core Register Descriptions
7
7
6
6
L2_MRU
5
5
4
4
3
3
RSVD
2
2
1
1
0
0