ALXD800EEXJ2VD AMD (ADVANCED MICRO DEVICES), ALXD800EEXJ2VD Datasheet - Page 664

• Manufacturer Part Number: ALXD800EEXJ2VD
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of ALXD800EEXJ2VD

• Operating Temperature (min): 0C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Compliant

All references to TOS and ST(n) refer to stack layout prior to execution. Values popped off the stack are discarded. A POP
from the stack increments the top of stack pointer. A PUSH to the stack decrements the top of stack pointer. Issues:
1)
2)
3)
4)
5)
664
FISUB Floating Point Integer Subtract
FISUBR Floating Point Integer Subtract Reverse
FTST Test Top of Stack
FUCOM Unordered Compare
FUCOMP Unordered Compare, Pop
FUCOMPP Unordered Compare, Pop two
FWAIT Wait
FXAM Report Class of Operand
FXCH Exchange Register with TOS
FXTRACT Extract Exponent
FLY2X Function Eval. y × Log2(x)
FLY2XP1 Function Eval. y × Log2(x+1)
— If FSINCOS is outside this range, add two times the FPREM clock counts for argument reduction
— If FCOS, FSIN, or FPTAN is outside this range, add FPREM clock counts for argument reduction
32-bit Integer
16-bit Integer
32-bit Integer Reversed
16-bit Integer Reversed
elements
For FCOS, FSIN, FSINCOS, and FPTAN, time shown is for the absolute value of TOS < π/4:
These instructions must wait for the FPU pipeline to flush. Cycle count depends on what instructions are in the pipe-
line.
These instructions are executed in a separate unit and execute in parallel with other multicycle instructions.
The Geode LX processor performs PFRCP and PFRSQRT to 24-bit accuracy in one cycle, so these instructions are
unnecessary. They are treated as a move.
5. The following opcodes are reserved:
D9D7, D9E2, D9E7, DDFC, DED8, DEDA, DEDC, DEDD, DEDE, and DFFC. If a reserved opcode is executed, unpre-
dictable results may occur (exceptions are not generated).
FPU Instruction
33234C
Table 8-29. FPU Instruction Set (Continued)
DA [mod 100 r/m]
DE [mod 100 r/m]
DA [mod 101 r/m]
DE [mod 101 r/m]
D9 E4
DD [1110 0 n]
DD [1110 1 n]
DA E9
9B
D9 E5
D9 [1100 1 n]
D9 F4
D9 F1
D9 F9
Opcode
TOS <--- TOS - M.SI
TOS <--- TOS - M.WI
TOS <--- M.SI - TOS
TOS <--- M.WI - TOS
CC set by TOS - 0.0
CC set by TOS - ST(n)
CC set by TOS - ST(n); then pop TOS
CC set by TOS - ST(I); then pop TOS and ST(1)
Wait for FPU not busy
CC <--- Class of TOS
TOS <--> ST(n) Exchange
temp <--- TOS;
TOS <--- exponent (temp); then
push significant (temp) onto stack
ST(1) <--- ST(1) × Log
ST(1) <--- ST(1) × Log
Operation
2
2
(TOS); then pop TOS
(1+TOS); then pop TOS
AMD Geode™ LX Processors Data Book
(or extended)
Single/Dbl
204 - 222
Clock Ct
220
2/7
2/7
2/7
2/7
1/6
1/6
1/6
3/6
Instruction Set
1+
1
1
1
Notes
2
3
3
4