ALXD800EEXJ2VD AMD (ADVANCED MICRO DEVICES), ALXD800EEXJ2VD Datasheet - Page 641

• Manufacturer Part Number: ALXD800EEXJ2VD
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of ALXD800EEXJ2VD

• Operating Temperature (min): 0C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Compliant

Instruction Set
Description
The DMINT instruction saves portions of the processors state to the Debug Management Mode (DMM) header, alters the
processors state for DMM, enters DMM, and then calls the DMM mode handler. Below is the format of the DMM header.
Flags Affected
All EFlags are returned to their reset values.
Exceptions
#UD
cessor is not in DMM.
Notes
Data address breakpoints on DMM header addresses that occur when executing the DMINT instruction are ignored.
The DMINT instruction clears the V, X, and H bits of the DMM header. DMINT sets the S bit of the DMM header. The
NEXT_IP failed of the DMM header will point to the instruction after the DMINT.
8.3.4.2
Operation
Same as an INT 1 instruction.
Description
The ICEBP instruction generates a call to the Debug exception handler. It’s advantage over the INT 1 instruction is that it is
a single byte opcode.
Flags Affected
The EFlags are pushed to the stack, and may then be modified before the debug exception handler is called. The EFlags
may be restored by the debug exception handler’s IRET.
Notes
Debuggers should not insert ICEBP instruction immediately after an instruction that alters the stack segment (MOV_SS).
AMD Geode™ LX Processors Data Book
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
G
G
Opcode
F1
B
D
0 Av
0 Av
ICEBP - Call Debug Exception Handler
If current privilege level is not 0, or the DMM_INST_EN = 0 and if the processor is not in SMM and if the pro-
Instruction
ICEBP
0
0
0
0
CS FLAGS
SS FLAGS
1
1
DPL
DPL
1
1
c
0
1
w
C
E W A
0
f
Clocks
29+
CURRENT_IP
c
R
r
AC TEMP0
CS BASE
NEXT_IP
EFLAGS
TEMP6
XDR6
XDR7
A
DR6
DR7
CR0
Description
Call Debug Exception Handler
0
CS LIMIT
INDEX
INDEX
CS SELECTOR
SS SELECTOR
8
7
V
33234C
X
6
5
0
H
4
S
3
TI
TI
2
0
1
0
RPL
RPL
0
0
-1C
-2C
-3C
-10
-14
-18
-20
-24
-28
-30
-34
-38
-C
-4
-8
641