ALXD800EEXJ2VD AMD (ADVANCED MICRO DEVICES), ALXD800EEXJ2VD Datasheet - Page 177

• Manufacturer Part Number: ALXD800EEXJ2VD
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of ALXD800EEXJ2VD

• Operating Temperature (min): 0C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Compliant

CPU Core Register Descriptions
5.5.2.85 L2 TLB/DTE/PTE Least Recently Used MSR (L2TLB_LRU_MSR)
MSR Address
Type
Reset Value
AMD Geode™ LX Processors Data Book
63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
63:53
52:32
31:22
15:6
Bits
Bit
5:0
Name
RSVD (RO)
INDEX
Name
RSVD (RO)
DTE_LRU
RSVD (RO)
RSVD
RSVD
0000189Dh
R/W
00000000_00000000h
L2TLB_INDEX_MSR Bit Descriptions (Continued)
Description
Reserved (Read Only). (Default = 0)
DTE/PTE Index. Increments on every access to L2TLB_ENTRY_I_MSR (MSR
0000189Fh).
Description
Reserved (Read Only). (Default = 0)
DTE Least Recently Used Value.
Bit 52: DTE entries 0-3 more recent than entries 4-7.
Bit 51: DTE entries 0-3 more recent than entries 8-11.
Bit 50: DTE entries 4-7 more recent than entries 8-11.
Bit 49: DTE entry 8 more recent than entry 9.
Bit 48: DTE entry 8 more recent than entry 10.
Bit 47: DTE entry 8 more recent than entry 11.
Bit 46: DTE entry 9 more recent than entry 10.
Bit 45: DTE entry 9 more recent than entry 11.
Bit 44: DTE entry 10 more recent than entry 11.
Bit 43: DTE entry 4 more recent than entry 5.
Bit 42: DTE entry 4 more recent than entry 6.
Bit 41: DTE entry 4 more recent than entry 7.
Bit 40: DTE entry 5 more recent than entry 6.
Bit 39: DTE entry 5 more recent than entry 7.
Bit 38: DTE entry 6 more recent than entry 7.
Bit 37: DTE entry 0 more recent than entry 1.
Bit 36: DTE entry 0 more recent than entry 2.
Bit 35: DTE entry 0 more recent than entry 3.
Bit 34: DTE entry 1 more recent than entry 2.
Bit 33: DTE entry 1 more recent than entry 3.
Bit 32: DTE entry 2 more recent than entry 3.
0: False (Default)
1: True
Reserved (Read Only). (Default = 0)
L2TLB_LRU_MSR Bit Descriptions
L2TLB_LRU_MSR Register Map
PTE_LRU
DTE_LRU
9
RSVD
8
33234C
7
6
5
4
3
2
1
177
0