ALXD800EEXJ2VD AMD (ADVANCED MICRO DEVICES), ALXD800EEXJ2VD Datasheet - Page 502

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ALXD800EEXJ2VD

Manufacturer Part Number
ALXD800EEXJ2VD
Description
Manufacturer
AMD (ADVANCED MICRO DEVICES)
Datasheet

Specifications of ALXD800EEXJ2VD

Operating Temperature (min)
0C
Operating Temperature (max)
85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Compliant

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6.10.2.22 VIP Ancillary Data/Message Passing/Data Streaming Buffer1 Base Address (VIP_ANC_MSG_1_BASE)
VIP Memory Offset 58h
Type
Reset Value
6.10.2.23 VIP Ancillary Data/Message Passing/Data Streaming Buffer 2 Base Address (VIP_ANC_MSG_2_BASE)
VIP Memory Offset 5Ch
Type
Reset Value
6.10.2.24 VIP Ancillary Data/Message Passing/Data Streaming Buffer Size (VIP_ANC_MSG_SIZE)
VIP Memory Offset 60h
Type
Reset Value
502
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
31:0
31:0
ANC_PACK_INT_THRESH
Bit
Bit
Name
ANC_MSG_1_
BASE
Name
ANC_MSG_2_
BASE
R/W
00000000h
R/W
00000000h
R/W
00000000h
33234C
Description
Ancillary Data/Message Passing Data/Data Streaming Base Address. This register
specifies the base address for the ancillary data when in VIP modes or message/stream-
ing data when in Message Passing or Data Streaming modes. Changes to this register
take effect at the beginning of the next field when in VIP mode. It takes place immediately
when in Message Passing or Data Streaming mode. The value in this register must be
32-byte aligned. (Bits [4:0] are required to be 00000.)
Note: This register is NOT double buffered
Description
Message Passing Data/Data Streaming Base Address. This register specifies the
base address for the second buffer used in Message Passing and Data Streaming
modes. Data written to this register takes place immediately (no double buffer). The
value in this register must be 32-byte aligned. (Bits [4:0] are required to be 00000.)
Note: This register is NOT double buffered.
VIP_ANC_MSG_1_BASE Bit Descriptions
VIP_ANC_MSG_2_BASE Bit Descriptions
RSVD
VIP_ANC_MSG_1_BASE Register Map
VIP_ANC_MSG_2_BASE Register Map
VIP_ANC_MSG_SIZE Register Map
ANC_MSG_1_BASE
ANC_MSG_2_BASE
ANC_MSG_STREAM_SIZE
AMD Geode™ LX Processors Data Book
Video Input Port Register Descriptions
9
9
9
8
8
8
7
7
7
6
6
6
5
5
5
4
4
Program to 00000
Program to 00000
4
3
3
3
2
2
2
1
1
1
0
0
0

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