ALXD800EEXJ2VD AMD (ADVANCED MICRO DEVICES), ALXD800EEXJ2VD Datasheet - Page 357

• Manufacturer Part Number: ALXD800EEXJ2VD
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of ALXD800EEXJ2VD

• Operating Temperature (min): 0C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Compliant

Display Controller Register Descriptions
6.6.18.4 VGA Clocking Mode
Index
Type
Reset Value
6.6.18.5 VGA Map Mask
Index
Type
Reset Value
These bits enable (bit = 1) writing to their corresponding bytes in each DWORD of the frame buffer (i.e., EM3 enables byte
3, EM2 enables byte 2, etc.). The four maps or planes correspond to the four bytes in each DWORD of the frame buffer.
Reads to all maps are always enabled, and are unaffected by these bits.
AMD Geode™ LX Processors Data Book
Bit
7:6
Bit
7:4
5
4
3
2
1
0
3
2
1
0
Name
RSVD
SCREEN_OFF
RSVD
DCLK_DIV2
RSVD
RSVD
CHAR_WIDTH
Name
RSVD
EM3
EM2
EM1
EM0
01h
R/W
02h
02h
R/W
00h
Description
Reserved.
Screen Off. Setting this bit to a 1 blanks the screen while maintaining the HSYNC and
VSYNC signals. This is intended to allow the CPU full access to the memory bandwidth.
This bit must be 0 for the display image to be visible.
Not Supported. (Shift4)
Dot Clock Divide By 2. When set to 1, the incoming pixel clock is divided by two to form
the actual Dot clock. When 0, the incoming pixel clock is used unchanged.
Not Supported. (Shift Load)
Reserved. Always 1.
8-Dot Character Width. When set to a 1, the character cells in text mode are eight pixels
wide. When set to 0, the character cells are nine pixels wide. The 9th pixel is equal to the
8th pixel for character codes C0h-DFh (the line graphics character codes), and is 0
(background) for all other codes.
Description
Reserved.
Enable Map 3.
Enable Map 2.
Enable Map 1.
Enable Map 0.
VGA Clocking Mode Register Bit Descriptions
VGA Map Mask Register Bit Descriptions
33234C
357