ALXD800EEXJ2VD AMD (ADVANCED MICRO DEVICES), ALXD800EEXJ2VD Datasheet - Page 375

no-image

ALXD800EEXJ2VD

Manufacturer Part Number
ALXD800EEXJ2VD
Description
Manufacturer
AMD (ADVANCED MICRO DEVICES)
Datasheet

Specifications of ALXD800EEXJ2VD

Operating Temperature (min)
0C
Operating Temperature (max)
85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ALXD800EEXJ2VD
Manufacturer:
AMD
Quantity:
453
Part Number:
ALXD800EEXJ2VD
Manufacturer:
AMD
Quantity:
784
Part Number:
ALXD800EEXJ2VD
Manufacturer:
AMD
Quantity:
20 000
Company:
Part Number:
ALXD800EEXJ2VD C3
Quantity:
91
Part Number:
ALXD800EEXJ2VD-C3
Manufacturer:
INTEL
Quantity:
472
Part Number:
ALXD800EEXJ2VD-C3
Manufacturer:
AMD
Quantity:
20 000
Display Controller Register Descriptions
6.6.20.9 VGA Miscellaneous
Index
Type
Reset Value
AMD Geode™ LX Processors Data Book
Bit
1:0
Bit
7:4
3:2
1
0
Name
WR_MD
Name
RSVD
MEM_MAP
ODD_EVEN
GPH_MD
06h
R/W
xxh
Description
Write Mode. This field specifies how CPU data is written to the frame buffer. Note that
the Write Operation field in theVGA Data Rotate register (Index 03h[4:3]) specifies how
CPU data is combined with data in the data latches for write modes 0, 2, and 3.
00: Write Mode 0: CPU data is rotated by the count in the VGA ata Rotate register. Each
01: Write Mode 1: Each map enabled by the VGA Map Mask Register is written with its
10: Write Mode 2: CPU data is replicated for each map and combined with the data
11: Write Mode 3: Each map is written with its corresponding Set/Reset bit replicated
Description
Reserved.
Memory Map. This field controls the address mapping of the frame buffer in the CPU
memory space.
00: Memory Map 0: A0000 to BFFFF (128 KB)
01: Memory Map 1: A0000 to AFFFF (64 KB)
10: Memory Map 2: B0000 to B7FFF (32 KB)
11: Memory Map 3: B8000 to BFFFF (32 KB)
Odd/Even. When set to 1, this bit replaces the CPU A0 address bit with a higher order bit
when addressing the frame buffer. Odd maps are then selected when CPU A0 = 1, and
even maps selected when CPU A0 = 0.
Graphics Mode.
0: Text mode operation.
1: Graphics mode operation.
VGA Graphics Mode Register Bit Descriptions
VGA Miscellaneous Register Bit Descriptions
map enabled by the VGA Map Mask Register (Index 02h) is written by the rotated
CPU data combined with the latch data (if set/reset is NOT enabled for that map) or
by the map’s corresponding set/reset bit replicated across the 8-bit byte (if set/reset
IS enabled for that map). The VGA Bit Mask Register (Index 08h) is used to protect
individual bits in each map from being updated.
corresponding byte in the data latches.
latches and written to memory. The VGA Bit Mask Register (Index 08h) is used to
protect individual bits in each map from being updated.
through a byte (Enable Set/Reset is ignored). The CPU data is rotated and ANDed
with the VGA Bit Mask Register (Index 08h). The resulting mask is used to protect
individual bits in each map.
33234C
375

Related parts for ALXD800EEXJ2VD