ALXD800EEXJ2VD AMD (ADVANCED MICRO DEVICES), ALXD800EEXJ2VD Datasheet - Page 409

• Manufacturer Part Number: ALXD800EEXJ2VD
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of ALXD800EEXJ2VD

• Operating Temperature (min): 0C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Compliant

Video Processor
6.7.8
Supported CRT and flat panel resolutions of the VP are
provided in Table 6-32 on page 279. All resolutions can be
up to 8 bits per color, or 24 bits per pixel. In general, all dis-
play resolutions contained in VESA Monitor Timing Specifi-
cations Version 1.0 v0.8 are supported for CRT. Flat panels
up to 1600x1200x60 are supported. For those resolutions
not listed in the VESA specification, the maximum Dot
clock frequency is 340 MHz for CRT and 170 MHz for TFT.
All SDTV and HDTV resolutions are also supported
6.7.9
Mode overview:
1)
AMD Geode™ LX Processors Data Book
LDEMOD
DRGB23
DRGB22
DRGB21
DRGB20
DRGB19
DRGB18
DRGB17
DRGB16
DRGB15
DRGB14
DRGB13
DRGB12
DRGB11
DRGB10
DOTCLK
DISPEN
HSYNC
VDDEN
DRGB9
DRGB8
DRGB7
DRGB6
DRGB5
DRGB4
DRGB3
DRGB2
DRGB1
DRGB0
VSYNC
CRT: Normal functional, CRT display.
Pin
VP Resolution Table
Display RGB Modes
VP_HSYNC
VP_VSYNC
CRT
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
FP_SHFCLK
FP_HSYNC
FP_VSYNC
FP_VDDEN
ONLINE
FP_LDE
BKLEN
TFT23
TFT22
TFT21
TFT20
TFT19
TFT18
TFT17
TFT16
TFT15
TFT14
TFT13
TFT12
TFT11
TFT10
TFT9
TFT8
TFT7
TFT6
TFT5
TFT4
TFT3
TFT2
TFT1
TFT0
TFT
2
Table 6-68. Display RGB Modes
DF_DOT_CLK
Legacy RGB
VG_HSYNC
VG_VSYNC
CRT
G7
G6
G5
G4
G3
G2
R7
R6
R5
R4
R3
B7
B6
B5
B4
B3
3
0
0
0
0
0
0
0
0
0
0
0
DF_DOT_CLK
VG_DISP_EN
Legacy RGB
VG_HSYNC
2)
3)
4)
5)
6)
7)
VG_VSYNC
TFT
R7
R6
R5
R4
R3
R2
R1
R0
G7
G6
G5
G4
G3
G2
G1
G0
B7
B6
B5
B4
B3
B2
B1
B0
TFT Online: Normal functional, TFT display.
CRT Legacy RGB: Use companion device as off-chip
display controller, graphics only for CRT.
TFT Legacy RGB: Use the Geode™ companion
device as off-chip display controller, graphics only for
CRT.
CRT Debug: Normal functional, access to debug sig-
nals. The DBG signals are driven on the specified pins
outside the VP module, listed here for information only.
TFT Legacy RGB Debug: Use companion device as
off-chip display controller, reduced graphics only for
CRT, access to debug signals. The DBG signals are
driven on the specified pins outside the VP module,
listed here for information only.
VOP: Normal function
4
0
0
CRT Debug
VP_HSYNC
VP_VSYNC
DBG_CLK
DBG15
DBG14
DBG13
DBG12
DBG11
DBG10
DBG09
DBG08
DBG07
DBG06
DBG05
DBG04
DBG03
DBG02
DBG01
DBG00
5
0
0
0
0
0
0
0
0
0
0
0
33234C
DF_DOT_CLK
VG_DISP_EN
VG_HSYNC
VG_VSYNC
LEGACY
DBG15
DBG14
DBG13
DBG12
DBG11
DBG10
DBG09
DBG08
DBG07
DBG06
DBG05
DBG04
DBG03
DBG02
DBG01
DBG00
Debug
RGB
TFT
R7
R6
R5
G7
G6
G5
B7
B6
6
0
0
VOPCLK
VOP10
VOP11
VOP12
VOP13
VOP14
VOP15
VOP8
VOP9
VOP0
VOP1
VOP2
VOP3
VOP4
VOP5
VOP6
VOP7
VOP
7
0
0
0
0
0
0
0
0
0
0
0
0
0
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