ALXD800EEXJ2VD AMD (ADVANCED MICRO DEVICES), ALXD800EEXJ2VD Datasheet - Page 344

• Manufacturer Part Number: ALXD800EEXJ2VD
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of ALXD800EEXJ2VD

• Operating Temperature (min): 0C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Compliant

6.6.11.4 DC VBI Odd Line Enable (DC_VBI_LN_ODD)
DC Memory Offset 0ACh
Type
Reset Value
Settings written to this register do not take effect until the start of the following frame or interlaced field.
6.6.11.5 DC VBI Even Line Enable (DC_VBI_LN_EVEN)
DC Memory Offset 0B0h
Type
Reset Value
Settings written to this register do not take effect until the start of the following frame or interlaced field.
344
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
31:25
31:25
24:2
24:2
Bit
1:0
Bit
1:0
LN_OFFSET_EVEN
LN_OFFSET_ODD
Name
LN_OFFSET_
ODD
LN_EN_ODD
RSVD
Name
LN_OFFSET_
EVEN
LN_EN_EVEN
RSVD
R/W
xxxxxxxxh
R/W
xxxxxxxxh
33234C
Description
Odd Line Offset. Specifies the offset (in lines) of the start of VBI data from the initial
edge of VSYNC. This field is not used if interlacing is disabled. This field must be set to a
value of 126 or less.
Odd Line Enable. Each of the bits in this field corresponds to a line (24-2) of VBI data.
Setting a bit in this field to 1 enables the corresponding line of VBI data in the odd field.
This field is not used if interlacing is disabled.
Reserved. Set to 0.
Description
Even Line Offset. Specifies the offset (in lines) of the start of VBI data from the initial
edge of VSYNC. This field is used for all frames if interlacing is disabled. This field must
be set to a value of 126 or less.
Even Line Enable. Each of the bits in this field corresponds to a line (24-2) of VBI data.
Setting a bit in this field to 1 enables the corresponding line of VBI data in the even field.
This field is used for all frames if interlacing is disabled.
Reserved. Set to 0.
DC_VBI_LN_EVEN Bit Descriptions
DC_VBI_LN_ODD Bit Descriptions
DC_VBI_LN_EVEN Register Map
DC_VBI_LN_ODD Register Map
LN_EN_EVEN
LN_EN_ODD
Display Controller Register Descriptions
AMD Geode™ LX Processors Data Book
9
9
8
8
7
7
6
6
5
5
4
4
3
3
2
2
RSVD
RSVD
1
1
0
0