UPD78F1152AGC-GAD-AX Renesas Electronics America, UPD78F1152AGC-GAD-AX Datasheet - Page 144

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UPD78F1152AGC-GAD-AX

Manufacturer Part Number
UPD78F1152AGC-GAD-AX
Description
MCU 16BIT 78K0R/KX3 80-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Kx3r
Datasheet

Specifications of UPD78F1152AGC-GAD-AX

Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
65
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD78F1152AGC-GAD-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
(4) Port input mode registers (PIM0, PIM4, PIM14)
(5) Port output mode registers (POM0, POM4, POM14)
142
Symbol
Symbol
POM14
PIM14
POM0
POM4
PIM0
PIM4
These registers set the input buffer of P03, P04, P43, P44, P142, or P143 in 1-bit units.
TTL input buffer can be selected during serial communication with an external device of the different potential.
These registers can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation clears these registers to 00H.
These registers set the output mode of P02 to P04, P43, P45, or P142 to P144 in 1-bit units.
N-ch open drain output (V
device of the different potential, and for the SDA10 and SDA20 pins during simplified I
external device of the same potential.
These registers can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation clears these registers to 00H.
POMmn
PIMmn
7
0
0
0
7
0
0
0
0
1
0
1
Normal input buffer
TTL input buffer
Normal output mode
N-ch open-drain output (V
6
0
0
0
6
0
0
0
POM45
5
0
0
0
DD
5
0
0
Figure 4-39. Format of Port Input Mode Register
Figure 4-40. Format of Port Input Mode Register
tolerance) mode can be selected during serial communication with an external
POM144 POM143 POM142
POM04
PIM04
PIM44
4
0
4
0
CHAPTER 4 PORT FUNCTIONS
DD
tolerance) mode
User’s Manual U17893EJ8V0UD
PIM143
POM03
POM43
PIM03
PIM43
3
3
Pmn pin output mode selection
Pmn pin input buffer selection
PIM142
POM02
(m = 0, 4, 14; n = 2 to 4)
(m = 0, 4, 14; n = 2 to 5)
2
0
0
2
0
1
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
Address
F0040H
F0044H
F004EH
Address
F0050H
F0054H
F005EH
2
C communication with an
After reset
After reset
00H
00H
00H
00H
00H
00H
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W

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