UPD78F1152AGC-GAD-AX Renesas Electronics America, UPD78F1152AGC-GAD-AX Datasheet - Page 356

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UPD78F1152AGC-GAD-AX

Manufacturer Part Number
UPD78F1152AGC-GAD-AX
Description
MCU 16BIT 78K0R/KX3 80-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Kx3r
Datasheet

Specifications of UPD78F1152AGC-GAD-AX

Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
65
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
UPD78F1152AGC-GAD-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
12.1.3 Simplified I
(SCL) and serial data (SDA). This simplified I
flash memory, or A/D converter, and therefore, it functions only as a master and does not have a function to detect
wait states.
stop conditions are observed.
354
This is a clocked communication function to communicate with two or more devices by using two lines: serial clock
Make sure by using software, as well as operating the control registers, that the AC specifications of the start and
[Data transmission/reception]
[Interrupt function]
[Error detection flag]
* [Functions not supported by simplified I
• Master transmission, master reception (only master function with a single master)
• ACK output function
• Data length of 8 bits (When an address is transmitted, the address is specified by the higher 7 bits, and the
• Manual generation of start condition and stop condition
• Transfer end interrupt
• Parity error (ACK error)
• Slave transmission, slave reception
• Arbitration loss detection function
• Wait detection functions
Note An ACK is not output when the last data is being received by writing 0 to the SOEmn (SOEm register)
Remarks 1. To use the full-function I
least significant bit is used for R/W control.)
bit and stopping the output of serial communication data. See 12.7.3 (2) Processing flow for details.
2. m: Unit number (m = 0, 1), n: Channel number (n = 0, 2)
2
C (IIC10, IIC20)
Note
and ACK detection function
CHAPTER 12 SERIAL ARRAY UNIT
2
C]
2
2
User’s Manual U17893EJ8V0UD
C is designed for single communication with a device such as EEPROM,
C bus, see CHAPTER 13 SERIAL INTERFACE IIC0.

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