UPD78F1152AGC-GAD-AX Renesas Electronics America, UPD78F1152AGC-GAD-AX Datasheet - Page 854

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UPD78F1152AGC-GAD-AX

Manufacturer Part Number
UPD78F1152AGC-GAD-AX
Description
MCU 16BIT 78K0R/KX3 80-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Kx3r
Datasheet

Specifications of UPD78F1152AGC-GAD-AX

Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
65
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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Part Number:
UPD78F1152AGC-GAD-AX
Manufacturer:
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Quantity:
10 000
852
Clock
generator
operation
when
power
supply
voltage is
turned on
Controlling
high-speed
system
clock
Controlling
internal
high-speed
oscillation
clock
Subsystem
clock
control
Function
When LVI
default start
function enabled
is set (option
byte: LVIOFF =
0)
X1/P121,
X2/EXCLK/P122
X1 clock
External main
system clock
High-speed
system clock
Internal high-
speed oscillation
clock
XT1/P123,
XT2/P124
Subsystem clock When the subsystem clock is used as the CPU clock, the subsystem clock is also
Details of
Function
If switching the CPU/peripheral hardware clock from the high-speed system clock to
the internal high-speed oscillation clock after restarting the internal high-speed
oscillation clock, do so after 10
A voltage oscillation stabilization time is required after the supply voltage reaches
1.59 V (TYP.). If the supply voltage rises from 1.59 V (TYP.) to 2.07 V (TYP.) within
the power supply oscillation stabilization time, the power supply oscillation
stabilization time is automatically generated before reset processing.
It is not necessary to wait for the oscillation stabilization time when an external clock
input from the EXCLK pin is used.
The X1/P121 and X2/EXCLK/P122 pins are in the input port mode after a reset
release.
The CMC register can be written only once after reset release, by an 8-bit memory
manipulation instruction.
OSCSELS bit at the same time. For OSCSELS bit, see 5.6.3 Example of controlling
subsystem clock.
Set the X1 clock after the supply voltage has reached the operable voltage of the
clock to be used (see CHAPTER 28 ELECTRICAL SPECIFICATIONS (STANDARD
PRODUCTS) and CHAPTER 29 ELECTRICAL SPECIFICATIONS ((A) GRADE
PRODUCTS)).
The CMC register can be written only once after reset release, by an 8-bit memory
manipulation instruction.
OSCSELS bits at the same time.
controlling subsystem clock.
Set the external main system clock after the supply voltage has reached the operable
voltage of the clock to be used (see CHAPTER 28 ELECTRICAL SPECIFICATIONS
(STANDARD PRODUCTS) and CHAPTER 29 ELECTRICAL SPECIFICATIONS ((A)
GRADE PRODUCTS)).
Be sure to clear bit 1 of the PER0 register to 0.
Be sure to confirm that MCS = 0 or CLS = 1 when setting MSTOP to 1. In addition,
stop peripheral hardware that is operating on the high-speed system clock.
If the switching is made immediately after the internal high-speed oscillation clock is
restarted, the accuracy of the internal high-speed oscillation cannot be guaranteed
for 10
Be sure to confirm that MCS = 1 or CLS = 1 when setting HIOSTOP to 1. In addition,
stop peripheral hardware that is operating on the internal high-speed oscillation clock.
The XT1/P123 and XT2/P124 pins are in the input port mode after a reset release.
supplied to the peripheral hardware (except the real-time counter, clock
output/buzzer output, and watchdog timer). At this time, the operations of the A/D
converter and IIC0 are not guaranteed.
peripheral hardware, refer to the chapters describing the various peripheral hardware
as
PRODUCTS) and CHAPTER 29 ELECTRICAL SPECIFICATIONS ((A) GRADE
PRODUCTS).
well
μ
APPENDIX B LIST OF CAUTIONS
s.
as
User’s Manual U17893EJ8V0UD
CHAPTER
Therefore, it is necessary to also set the value of the
Therefore, it is necessary to also set the value of the
28
μ
s or more have elapsed.
ELECTRICAL
Cautions
For OSCSELS bits, see 5.6.3 Example of
For the operating characteristics of the
SPECIFICATIONS
(STANDARD
p.175
p.175
p.176
p.176
p.176
p.177
p.177
p.178
p.179
p.180
p.181
p.181
pp.181,
182
Page
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