UPD78F1152AGC-GAD-AX Renesas Electronics America, UPD78F1152AGC-GAD-AX Datasheet - Page 667

• Manufacturer Part Number: UPD78F1152AGC-GAD-AX
• Description: MCU 16BIT 78K0R/KX3 80-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3r

Specifications of UPD78F1152AGC-GAD-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 65
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Supply voltage (V
Internal reset signal
V
Notes 1.
Remark <1> to <8> in Figure 21-8 above correspond to <1> to <8> in the description of “When starting
POC
(set by software)
(set by software)
(set by software)
(set by software)
= 1.59 V (TYP.)
LVISEL flag
LVIMK flag
LVIMD flag
LVION flag
LVIIF flag
2.
3.
LVIF flag
INTLVI
operation” in 21.4.2 (1) (a) When LVI Default Start Function Stopped Is Set (Option Byte: LVIOFF =
1).
The LVIMK flag is set to “1” by reset signal generation.
The interrupt request signal (INTLVI) is generated and the LVIF and LVIIF flags may be set (1).
If LVI operation is disabled when the supply voltage (V
(V
V
DD
LVI
LVI
)
), an interrupt request signal (INTLVI) is generated and LVIIF may be set to 1.
Figure 21-8. Timing of Low-Voltage Detector Interrupt Signal Generation
L
L
<2>
<1>
Note 1
Note 2
Note 2
Note 2
<4>
<8> Cleared by software
<6>
<7>
Cleared by software
(Bit: LVISEL = 0, Option Byte: LVIOFF = 1)
<3>
CHAPTER 21 LOW-VOLTAGE DETECTOR
<5> Wait time
Note 3
User’s Manual U17893EJ8V0UD
Note 3
DD
) is less than or equal to the detection voltage
Time
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