UPD78F1152AGC-GAD-AX Renesas Electronics America, UPD78F1152AGC-GAD-AX Datasheet - Page 850

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UPD78F1152AGC-GAD-AX

Manufacturer Part Number
UPD78F1152AGC-GAD-AX
Description
MCU 16BIT 78K0R/KX3 80-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Kx3r
Datasheet

Specifications of UPD78F1152AGC-GAD-AX

Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
65
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
UPD78F1152AGC-GAD-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
848
Port
functions
Function
P10/SCK00,
P11/SI00/RxD,
P12/SO00/TxD0,
P13/TxD3,
P14/RxD3
P16/TI01/TO01/
INTP5,
P17/TI02/TO02
P15/RTCDIV/
RTCCL
Port 2
P31/TI03/TO03/
INTP4
P30/RTC1HZ/
INTP3
P40/TOOL0,
P41/TOOL1
P43/SCK01,
P44/SI01,
P45/SO01
P42/TI04/TO04
P60/SCL0,
P61/SDA0
P110, P111
P121 to P124
Details of
Function
To use P42/TI04/TO04 as a general-purpose port, set bits 4 (TO04) of timer output
register 0 (TO0) and bit 4 (TOE04) of timer output enable register 0 (TOE0) to “0”,
which is the same as their default status setting.
To use P10/SCK00, P11/SI00/RxD0, P12/SO00/TxD0, P13/TxD3, or P14/RxD3 as a
general-purpose port, note the serial array unit setting.
following tables.
• Table 12-5 Relationship Between Register Settings and Pins (Channel 0 of Unit 0:
• Table 12-6 Relationship Between Register Settings and Pins (Channel 1 of Unit 0:
• Table 12-11 Relationship Between Register Settings and Pins (Channel 2 of Unit 1:
• Table 12-12 Relationship Between Register Settings and Pins (Channel 3 of Unit 1:
To use P16/TI01/TO01/INTP5 or P17/TI02/TO02 as a general-purpose port, set bits 1
and 2 (TO01, TO02) of timer output register 0 (TO0) and bits 1 and 2 (TOE01,
TOE02) of timer output enable register 0 (TOE0) to “0”, which is the same as their
default status setting.
To use P15/RTCDIV/RTCCL as a general-purpose port, set bit 4 (RCLOE0) of real-
time counter control register 0 (RTCC0) and bit 6 (RCLOE2) of real-time counter
control register 2 (RTCC2) to “0”, which is the same as their default status settings.
See 2.2.14 AV
a digital I/O.
To use P31/TI03/TO03/INTP4 as a general-purpose port, set bit 3 (TO03) of timer
output register 0 (TO0) and bit 3 (TOE03) of timer output enable register 0 (TOE0) to
“0”, which is the same as their default status setting.
To use P30/RTC1HZ/INTP3 as a general-purpose port, set bit 5 (RCLOE1) of real-
time counter control register 0 (RTCC0) to “0”, which is the same as its default status
setting.
When a tool is connected, the P40 pin cannot be used as a port pin.
When the on-chip debug function is used, P41 pin can be used as follows by the
mode setting on the debugger.
1-line mode: can be used as a port (P41).
2-line mode: used as a TOOL1 pin and cannot be used as a port (P41).
To use P43/SCK01, P44/SI01, or P45/SO01 as a general-purpose port, note the
serial array unit 0 setting. For details, refer to Table 12-6 Relationship Between
Register Settings and Pins (Channel 1 of Unit 0: CSI01, UART0 reception).
When using P60/SCL0 or P61/SDA0 as a general-purpose port, stop the operation of
serial interface IIC0.
See 2.2.15 AV
and P111 as a digital I/O.
The function setting on P121 to P124 is available only once after the reset release.
The port once set for connection to an oscillator cannot be used as an input port
unless the reset is performed.
CSI00, UART0 Transmission)
CSI01, UART0 Reception)
UART3 Transmission)
UART3 Reception)
APPENDIX B LIST OF CAUTIONS
User’s Manual U17893EJ8V0UD
REF0
REF1
for the voltage to be applied to the AV
for the voltage to be applied to the AV
Cautions
REF0
REF1
For details, refer to the
pin when using port 2 as
pin when using P110
p.104
p.104
p.104
p.110
p.111
p.111
p.113
p.113
p.113
p.123
p.128
p.129
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