UPD78F1152AGC-GAD-AX Renesas Electronics America, UPD78F1152AGC-GAD-AX Datasheet - Page 634

no-image

UPD78F1152AGC-GAD-AX

Manufacturer Part Number
UPD78F1152AGC-GAD-AX
Description
MCU 16BIT 78K0R/KX3 80-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Kx3r
Datasheet

Specifications of UPD78F1152AGC-GAD-AX

Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
65
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD78F1152AGC-GAD-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
(2) STOP mode release
632
High-speed system
clock (X1 oscillation)
is selected as CPU
clock when STOP
instruction is executed
High-speed system
clock (external clock
input) is selected as
CPU clock when STOP
instruction is executed
Internal high-speed
oscillation clock is
selected as CPU clock
when STOP instruction
is executed
High-speed system
clock (X1 oscillation)
High-speed system
clock (external clock
input)
Internal high-speed
oscillation clock
Figure 18-5. Operation Timing When STOP Mode Is Released (Release by Unmasked Interrupt Request)
Notes 1. When the oscillation stabilization time set by OSTS is equal to or shorter than 61
Remark f
The STOP mode can be released by the following two sources.
2. The wait time is as follows:
is retained to a maximum of "61
f
f
EX
IH
CLK
:
:
: CPU/peripheral hardware clock frequency
STOP mode
• When vectored interrupt servicing is carried out:
• When vectored interrupt servicing is not carried out:
External main system clock frequency
Internal high-speed oscillation clock frequency
STOP mode release
Wait for oscillation accuracy stabilization
(oscillation stabilization time set by OSTS)
CHAPTER 18 STANDBY FUNCTION
Supply of the CPU clock is stopped (when f
Supply of the CPU clock is stopped (when f
HALT status
User’s Manual U17893EJ8V0UD
μ
s + wait time."
Wait
Internal high-speed
Wait
oscillation clock
Note 2
Note 2
Note1
Clock switched by software
Clock switched by software
10 to 12 clocks
5 or 6 clocks
CLK
CLK
High-speed system clock
High-speed system clock
= f
= f
EX
IH
: 23 to 61 s)
: 23 to 61 s)
High-speed system clock
μ
μ
μ
s, the HALT status

Related parts for UPD78F1152AGC-GAD-AX