UPD78F1152AGC-GAD-AX Renesas Electronics America, UPD78F1152AGC-GAD-AX Datasheet - Page 481

• Manufacturer Part Number: UPD78F1152AGC-GAD-AX
• Description: MCU 16BIT 78K0R/KX3 80-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3r

Specifications of UPD78F1152AGC-GAD-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 65
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

(1) Register setting
SMRmn
SCRmn
SDRmn
SOEm
SOm
SSm
Figure 12-100. Example of Contents of Registers for Data Reception of Simplified I
(a) Serial output register m (SOm) … Do not manipulate this register during data
(b) Serial output enable register m (SOEm) … Do not manipulate this register during data
(c) Serial channel start register m (SSm) … Do not manipulate this register during data
(d) Serial mode register mn (SMRmn) … Do not manipulate this register during data
(e) Serial communication operation setting register mn (SCRmn) … Do not manipulate the bits of this
(f) Serial data register mn (SDRmn) (lower 8 bits: SIOr)
Note The value varies depending on the communication data during communication operation.
Remark
CKSmn
TXEmn
0/1
15
15
15
15
15
15
0
0
0
0
m: Unit number (m = 0, 1), n: Channel number (n = 0, 2), r: IIC number (r = 10, 20)
×: Bit that cannot be used in this mode (set to the initial value when not used in any mode)
0/1: Set to 0 or 1 depending on the usage of the user
CCSmn
RXEmn
14
14
14
14
14
14
0
0
1
0
0
: Setting is fixed in the IIC mode,
DAPmn
13
13
13
13
13
13
0
0
0
0
0
Baud rate setting
CKPmn
12
12
12
12
12
12
0
0
0
0
0
11
11
11
11
11
11
0
1
0
0
0
CHAPTER 12 SERIAL ARRAY UNIT
EOCmn
CKOm2
0/1
10
10
10
10
10
10
0
0
0
0
Note
User’s Manual U17893EJ8V0UD
transmission/reception.
CKOm1
PTCmn1
transmission/reception.
0
9
×
0
0
9
0
9
9
9
9
transmission/reception.
CKOm0
PTCmn0
STSmn
0/1
transmission/reception.
: Setting disabled (set to the initial value)
8
8
0
8
0
8
0
8
0
8
0
Note
DIRmn
0
0
7
0
7
7
0
7
0
7
7
SISmn0
0
0
6
0
6
6
0
6
0
6
6
SLCmn1
Dummy transmit data setting (FFH)
0
0
5
0
0
5
1
5
5
5
5
SLCmn0
register, except the TXEmn and
RXEmn bits, during data
transmission/reception.
4
0
0
0
4
0
4
1
4
4
4
SIOr
SSm3
3
1
×
3
0
3
0
3
0
3
3
SOEm2
MDmn2
DLSmn2
0/1
SOm2
SSm2
0/1
0/1
1
2
1
2
2
2
2
2
2
Note
C (IIC10, IIC20)
SOEm1
MDmn1
DLSmn1
SOm1
SSm1
×
0
1
1
1
×
1
×
1
1
1
MDmn0
DLSmn0
0/1
SOEm0
SOm0
SSm0
0/1
0/1
0
1
0
0
0
0
0
0
Note
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