UPD78F1152AGC-GAD-AX Renesas Electronics America, UPD78F1152AGC-GAD-AX Datasheet - Page 39

• Manufacturer Part Number: UPD78F1152AGC-GAD-AX
• Description: MCU 16BIT 78K0R/KX3 80-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3r

Specifications of UPD78F1152AGC-GAD-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 65
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

(2) Control mode
2.2.7 P60 to P67 (port 6)
(1) Port mode
(2) Control mode
2.2.8 P70 to P77 (port 7)
request input.
(1) Port mode
(2) Control mode
P60 to P67 function as an 8-bit I/O port. These pins also function as serial interface data I/O and clock I/O.
The following operation modes can be specified in 1-bit units.
P70 to P77 function as an 8-bit I/O port. These pins also function as key interrupt input and external interrupt
The following operation modes can be specified in 1-bit units.
P50, P51 function as external interrupt request input.
(a) INTP1, INTP2
P60 to P67 function as an 8-bit I/O port. P60 to P67 can be set to input port or output port in 1-bit units using port
mode register 6 (PM6). Only for P64 to P67, use of an on-chip pull-up resistor can be specified by pull-up resistor
option register 6 (PU6).
Output of P60 to P63 is N-ch open-drain output (6 V tolerance).
P60, P61 function as serial interface data I/O and clock I/O.
(a) SDA0
(b) SCL0
P70 to P77 function as an 8-bit I/O port. P70 to P77 can be set to input or output port in 1-bit units using port
mode register 7 (PM7). Use of an on-chip pull-up resistor can be specified by pull-up resistor option register 7
(PU7).
P70 to P77 function as key interrupt input and external interrupt request input.
(a) KR0 to KR7
(b) INTP8 to INTP11
These are the external interrupt request input pins for which the valid edge (rising edge, falling edge, or both
rising and falling edges) can be specified.
This is a serial data I/O pin of serial interface IIC0.
This is a serial clock I/O pin of serial interface IIC0.
These are the key interrupt input pins
These are the external interrupt request input pins for which the valid edge (rising edge, falling edge, or both
rising and falling edges) can be specified.
CHAPTER 2 PIN FUNCTIONS
User’s Manual U17893EJ8V0UD
37