UPD78F1152AGC-GAD-AX Renesas Electronics America, UPD78F1152AGC-GAD-AX Datasheet - Page 885

• Manufacturer Part Number: UPD78F1152AGC-GAD-AX
• Description: MCU 16BIT 78K0R/KX3 80-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3r

Specifications of UPD78F1152AGC-GAD-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 65
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Remark “Classification” in the above table classifies revisions as follows.
CHAPTER 15 DMA CONTROLLER (continuation)
p.591
p.592
p.594
p.595
p.596
CHAPTER 16 INTERRUPT FUNCTIONS
p.600
p.601
p.618
CHAPTER 17 KEY INTERRUPT FUNCTION
p.619
p.620
CHAPTER 26 BCD CORRECTION CIRCUIT
p.703
CHAPTER 27 INSTRUCTION SET
p.708
p.724
p.725
CHAPTER 28 ELECTRICAL SPECIFICATIONS (STANDARD PRODUCTS)
p.728
p.730
pp.731, 733
to 735
pp.732, 734
pp.743 to
747
p.755
p.756
p.758
pp.764, 765
p.767
Page
(a): Error correction, (b): Addition/change of specifications, (c): Addition/change of description or note,
(d): Addition/change of package, part number, or management division, (e): Addition/change of related
documents
Addition of Caution to Figure 15-12. Example of Setting for Holding DMA Transfer Pending by
DWAITn
Change of 15.5.7 Forced termination by software
Change of (1) Priority of DMA in 15.6 Cautions on Using DMA Controller
Change of (2) DMA response time in 15.6 Cautions on Using DMA Controller
Change of description in (4) DMA pending instruction in 15.6 Cautions on Using DMA
Controller
Change of (B) External maskable interrupt (INTPn) in Figure 16-1. Basic Configuration of
Interrupt Function
Addition of (C) External maskable interrupt (INTKR) to Figure 16-1. Basic Configuration of
Interrupt Function
Addition of instruction to 16.4.4 Interrupt request hold
Change of Table 17-2. Configuration of Key Interrupt
Addition of 17.3 (2) Port mode register 7 (PM7)
Change of 26.3 BCD Correction Circuit Operation
Change of description in 27.1.4 PREFIX instruction
Change of Clocks of BT Mnemonic in Table 27-5. Operation List (16/17)
Change of Clocks of BF Mnemonic in Table 27-5. Operation List (17/17)
Deletion of Remark in X1 Oscillator Characteristics
Deletion of Remark in XT1 Oscillator Characteristics
Change of Caution in Recommended Oscillator Constants
Addition of KYOCERA KINSEKI Co., Ltd. to Recommended Oscillator Constants
Addition of Remark to Supply current in DC Characteristics
Change of (b) During communication at same potential (CSI mode) (master mode, SCKp...
internal clock output) in Serial interface: Serial array unit
Change of (c) During communication at same potential (CSI mode) (slave mode, SCKp...
external clock input) in Serial interface: Serial array unit
Addition of Note to (d) During communication at same potential (simplified I
interface: Serial array unit
Change of (f) During communication at different potential (2.5 V, 3 V) (CSI mode) (master
mode, SCKp... internal clock output) in Serial interface: Serial array unit
Change of (g) During communication at different potential (2.5 V, 3 V) (CSI mode) (slave
mode, SCKp... external clock input) in Serial interface: Serial array unit
APPENDIX C REVISION HISTORY
User’s Manual U17893EJ8V0UD
Description
2
C mode) in Serial
Classification
(a)
(a)
(a)
(b)
(b)
(b)
(b)
(c)
(c)
(c)
(c)
(c)
(c)
(c)
(c)
(c)
(c)
(c)
(c)
(c)
(c)
(c)
(c)
(c)
(4/5)
883