UPD78F1152AGC-GAD-AX Renesas Electronics America, UPD78F1152AGC-GAD-AX Datasheet - Page 278

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UPD78F1152AGC-GAD-AX

Manufacturer Part Number
UPD78F1152AGC-GAD-AX
Description
MCU 16BIT 78K0R/KX3 80-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Kx3r
Datasheet

Specifications of UPD78F1152AGC-GAD-AX

Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
65
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

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Part Number:
UPD78F1152AGC-GAD-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
276
Address: F00F0H
(1) Peripheral enable register 0 (PER0)
(2) Real-time counter control register 0 (RTCC0)
Symbol
PER0
PER0 is used to enable or disable use of each peripheral hardware macro. Clock supply to a hardware macro
that is not used is stopped in order to reduce the power consumption and noise.
When the real-time counter is used, be sure to set bit 7 (RTCEN) of this register to 1.
PER0 can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation clears this register to 00H.
The RTCC0 register is an 8-bit register that is used to start or stop the real-time counter operation, control the
RTCCL and RTC1HZ pins, and set a 12- or 24-hour system and the constant-period interrupt function.
RTCC0 can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation clears this register to 00H.
RTCEN
RTCEN
Note RTCEN is used to supply or stop the clock used when accessing the real-time counter (RTC)
Cautions 1. When using the real-time counter, first set RTCEN to 1, while oscillation of the
<7>
0
1
After reset: 00H
register from the CPU. RTCEN cannot control supply of the operating clock (f
Stops supply of input clock.
• SFR used by the real-time counter (RTC) cannot be written.
• The real-time counter (RTC) is in the reset status.
Supplies input clock.
• SFR used by the real-time counter (RTC) can be read/written.
2. Be sure to clear bit 1 of the PER0 register to 0.
Figure 7-2. Format of Peripheral Enable Register 0 (PER0)
DACEN
subsystem clock (f
real-time counter is ignored, and, even if the register is read, only the default
value is read.
<6>
R/W
CHAPTER 7 REAL-TIME COUNTER
ADCEN
<5>
User’s Manual U17893EJ8V0UD
Control of real-time counter (RTC) input clock supply
SUB
) is stable. If RTCEN = 0, writing to a control register of the
IIC0EN
<4>
SAU1EN
<3>
SAU0EN
<2>
Note
1
0
SUB
) to RTC.
TAU0EN
<0>

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