UPD78F1152AGC-GAD-AX Renesas Electronics America, UPD78F1152AGC-GAD-AX Datasheet - Page 348

• Manufacturer Part Number: UPD78F1152AGC-GAD-AX
• Description: MCU 16BIT 78K0R/KX3 80-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3r

Specifications of UPD78F1152AGC-GAD-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 65
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

11.3 Registers Used in D/A Converter
(1) Peripheral enable register 0 (PER0)
346
Address: F00F0H
The D/A converter uses the following three registers.
• Peripheral enable register 0 (PER0)
• D/A converter mode register (DAM)
• 8-bit D/A conversion value setting registers 0, 1 (DACS0, DACS1)
• Port mode register 11 (PM11)
• Port register 11 (P11)
Symbol
PER0
PER0 is used to enable or disable use of each peripheral hardware macro. Clock supply to a hardware macro
that is not used is stopped in order to reduce the power consumption and noise.
When the D/A converter is used, be sure to set bit 6 (DACEN) of this register to 1.
PER0 can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation clears this register to 00H.
Cautions 1. When setting the D/A converter, be sure to set DACEN to 1 first. If DACEN = 0, writing to a
DACEN
RTCEN
2. Be sure to clear bit 1 of PER0 register to 0.
<7>
0
1
After reset: 00H
control register of the D/A converter is ignored, and, even if the register is read, only the
default value is read (except for port mode register 11 (PM11) and port register 11 (P11)).
Stops supply of input clock.
• SFR used by the D/A converter cannot be written.
• The D/A converter is in the reset status.
Supplies input clock.
• SFR used by the D/A converter can be read/written.
Figure 11-2. Format of Peripheral Enable Register 0 (PER0)
DACEN
<6>
R/W
ADCEN
CHAPTER 11 D/A CONVERTER
<5>
User’s Manual U17893EJ8V0UD
IIC0EN
Control of D/A converter input clock
<4>
SAU1EN
<3>
SAU0EN
<2>
1
0
TAU0EN
<0>