UPD78F1152AGC-GAD-AX Renesas Electronics America, UPD78F1152AGC-GAD-AX Datasheet - Page 463

• Manufacturer Part Number: UPD78F1152AGC-GAD-AX
• Description: MCU 16BIT 78K0R/KX3 80-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3r

Specifications of UPD78F1152AGC-GAD-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 65
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

(INTP0). The length of the sync field transmitted from the master can be measured by using the external event
capture operation of the timer array unit (TAU) to calculate a baud-rate error.
the external interrupt pin (INTP0) and timer array unit (TAU).
Figure 12-88 shows the configuration of a port that manipulates reception of LIN.
The wakeup signal transmitted from the master of LIN is received by detecting an edge of an external interrupt
By controlling switch of port input (ISC0/ISC1), the input source of port input (RxD3) for reception can be input to
Remark
P120/INTP0/
P145/TI07
P14/RxD3
EXLVI
ISC0, ISC1: Bits 0 and 1 of the input switch control register (ISC) (See Figure 12-17.)
Figure 12-88. Port Configuration for Manipulating Reception of LIN
Output latch
Output latch
Output latch
(P120)
(P145)
(P14)
Port mode
Port mode
Port mode
(PM120)
(PM145)
Selector
Selector
Selector
(PM14)
CHAPTER 12 SERIAL ARRAY UNIT
User’s Manual U17893EJ8V0UD
<ISC0>
0: Selects INTP0 (P120)
1: Selects RxD3 (P14)
<ISC1>
0: Selects TI07 (P145)
1: Selects RxD3 (P14)
switch control
switch control
Port input
Port input
Selector
Selector
(ISC0)
(ISC1)
RXD3 input
INTP0 input
Channel 7 input of TAU
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