UPD78F1152AGC-GAD-AX Renesas Electronics America, UPD78F1152AGC-GAD-AX Datasheet - Page 514

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UPD78F1152AGC-GAD-AX

Manufacturer Part Number
UPD78F1152AGC-GAD-AX
Description
MCU 16BIT 78K0R/KX3 80-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Kx3r
Datasheet

Specifications of UPD78F1152AGC-GAD-AX

Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
65
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD78F1152AGC-GAD-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
13.4 I
13.4.1 Pin configuration
resistor is required.
512
The serial clock pin (SCL0) and serial data bus pin (SDA0) are configured as follows.
(1) SCL0....... This pin is used for serial clock input and output.
(2) SDA0 ...... This pin is used for serial data input and output.
Since outputs from the serial clock line and the serial data bus line are N-ch open-drain outputs, an external pull-up
2
C Bus Mode Functions
(Clock input)
Clock output
Data output
Data input
This pin is an N-ch open-drain output for both master and slave devices. Input is Schmitt input.
This pin is an N-ch open-drain output for both master and slave devices. Input is Schmitt input.
Master device
V
V
SS
SS
Figure 13-12. Pin Configuration Diagram
CHAPTER 13 SERIAL INTERFACE IIC0
SCL0
SDA0
User’s Manual U17893EJ8V0UD
V
V
DD
DD
SCL0
SDA0
V
V
SS
SS
Slave device
(Clock output)
Clock input
Data output
Data input

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